root@zlin:..src/flashrom> ./flashrom -r old.rom
flashrom v0.9.1-r766
No coreboot table found.
Found chipset "Intel ICH8/ICH8R", enabling flash write... OK.
This chipset supports the following protocols: LPC,FWH,SPI.
Calibrating delay loop... OK.
Found chip "SST SST25VF080B" (1024 KB, SPI) at physical address 0xfff00000.
Reading flash... done.
root@zlin:..src/flashrom> ./flashrom -w old.rom 
flashrom v0.9.1-r766
No coreboot table found.
Found chipset "Intel ICH8/ICH8R", enabling flash write... OK.
This chipset supports the following protocols: LPC,FWH,SPI.
Calibrating delay loop... OK.
Found chip "SST SST25VF080B" (1024 KB, SPI) at physical address 0xfff00000.
Flash image seems to be a legacy BIOS. Disabling checks.
Writing flash chip... spi_write_status_register failed during command execution
spi_write_status_register failed
Erasing flash before programming... Erasing flash chip... spi_write_status_register failed during command execution
spi_write_status_register failed
spi_disable_blockprotect failed
spi_write_status_register failed during command execution
spi_write_status_register failed
spi_disable_blockprotect failed
FAILED!
ERASE FAILED!
FAILED!
Your flash chip is in an unknown state.
Get help on IRC at irc.freenode.net (channel #flashrom) or
mail flashrom@flashrom.org!
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DO NOT REBOOT OR POWEROFF!
root@zlin:..src/flashrom> ./flashrom -r new.rom
flashrom v0.9.1-r766
No coreboot table found.
Found chipset "Intel ICH8/ICH8R", enabling flash write... OK.
This chipset supports the following protocols: LPC,FWH,SPI.
Calibrating delay loop... OK.
Found chip "SST SST25VF080B" (1024 KB, SPI) at physical address 0xfff00000.
Reading flash... done.
root@zlin:..src/flashrom> cmp old.rom new.rom
root@zlin:..src/flashrom>