This adds the following:<div>- missing feature_bits to indicate WREN required before WRSR and the presence of OTP bytes</div><div>- a comment mentioning SFDP support</div><div>- voltage range<br><div><br></div><div>Signed-off-by: David Hendricks &lt;<a href="mailto:dhendrix@google.com">dhendrix@google.com</a>&gt;</div>

<div><br></div><div><div>Index: flashchips.c</div><div>===================================================================</div><div>--- flashchips.c        (revision 1553)</div><div>+++ flashchips.c        (working copy)</div>

<div>@@ -5431,6 +5431,9 @@</div><div>                .model_id       = ST_N25Q064,</div><div>                .total_size     = 8192,</div><div>                .page_size      = 256,</div><div>+               /* supports SFDP */</div>

<div>+               /* OTP: 64B total; read 0x4B, write 0x42 */</div><div>+               .feature_bits   = FEATURE_WRSR_WREN | FEATURE_OTP,</div><div>                .tested         = TEST_OK_PREW,</div><div>                .probe          = probe_spi_rdid,</div>

<div>                .probe_timing   = TIMING_ZERO,</div><div>@@ -5450,6 +5453,7 @@</div><div>                .unlock         = spi_disable_blockprotect,</div><div>                .write          = spi_chip_write_256,</div>

<div>                .read           = spi_chip_read,</div><div>+               .voltage        = {2700, 3600},</div><div>        },</div><div> </div><div>        {</div><div><br></div><div><br></div>-- <br>David Hendricks (dhendrix)<br>

Systems Software Engineer, Google Inc.<br>
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