The Intel Tunnel Creek chipset supports both an SPI and an LPC bus. Set chipset table entry for Tunnel Creek to new function “enable_flash_tunnelcreek”, which will read the hardware straps and return support for the bus that has been used for booting. This function uses “ich_init_spi” with ich_generation set to 7 for initializing the SPI bus if necessary.
SPI functionality tested on actual hardware (see attached file flashrom.log), Tunnel Creek LPC interface not tested yet (missing hardware for that). Marked Tunnel Creek chipset entry as tested.
The patch has been created vs. flashrom trunk 1424.
Signed-off-by: Ingo Feldschmid <ifel@msc-ge.com>
<<tunnelcreek_1424.patch>> <<flashrom.log>>
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