root@k12:..src/flashrom> ./flashrom -r old.rom
flashrom v0.9.1-r766
No coreboot table found.
Found chipset "Intel ICH4/ICH4-L", enabling flash write... OK.
This chipset supports the following protocols: Non-SPI.
Calibrating delay loop... OK.
Found chip "PMC Pm49FL002" (256 KB, LPC,FWH) at physical address 0xfffc0000.
Reading flash... done.
root@k12:..src/flashrom> ./flashrom -w old.rom
flashrom v0.9.1-r766
No coreboot table found.
Found chipset "Intel ICH4/ICH4-L", enabling flash write... OK.
This chipset supports the following protocols: Non-SPI.
Calibrating delay loop... OK.
Found chip "PMC Pm49FL002" (256 KB, LPC,FWH) at physical address 0xfffc0000.
Flash image seems to be a legacy BIOS. Disabling checks.
Writing flash chip... Programming page: ERASE FAILED at 0x00000000! Expected=0xff, Read=0x00, failed byte count from 0x00000000-0x00003fff: 0x373d
ERASE FAILED!
ERASE FAILED!
FAILED!
Your flash chip is in an unknown state.
Get help on IRC at irc.freenode.net (channel #flashrom) or
mail flashrom@flashrom.org!
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DO NOT REBOOT OR POWEROFF!
root@k12:..src/flashrom> ./flashrom -r old2.rom
flashrom v0.9.1-r766
No coreboot table found.
Found chipset "Intel ICH4/ICH4-L", enabling flash write... OK.
This chipset supports the following protocols: Non-SPI.
Calibrating delay loop... OK.
Found chip "PMC Pm49FL002" (256 KB, LPC,FWH) at physical address 0xfffc0000.
Reading flash... done.
root@k12:..src/flashrom> cmp old.rom old2.rom 
root@k12:..src/flashrom>