flashrom v1.2 on Linux 5.4.35-1-lts (x86_64)
flashrom was built with libpci 3.6.2, GCC 9.2.1 20200130, little endian
Command line (8 args): flashrom -p ch341a_spi -c GD25Q40(B) -r contents.img -o read.log.txt
Using clock_gettime for delay loops (clk_id: 1, resolution: 1ns).
Initializing ch341a_spi programmer
Device revision is 3.0.4
The following protocols are supported: SPI.
Probing for GigaDevice GD25Q40(B), 512 kB: probe_spi_rdid_generic: id1 0xc8, id2 0x4013
Found GigaDevice flash chip "GD25Q40(B)" (512 kB, SPI) on ch341a_spi.
Chip status register is 0x00.
Chip status register: Status Register Write Disable (SRWD, SRP, ...) is not set
Chip status register: Block Protect 4 (BP4) is not set
Chip status register: Block Protect 3 (BP3) is not set
Chip status register: Block Protect 2 (BP2) is not set
Chip status register: Block Protect 1 (BP1) is not set
Chip status register: Block Protect 0 (BP0) is not set
Chip status register: Write Enable Latch (WEL) is not set
Chip status register: Write In Progress (WIP/BUSY) is not set
===
This flash part has status UNTESTED for operations: PROBE READ ERASE WRITE
The test status of this chip may have been updated in the latest development
version of flashrom. If you are running the latest development version,
please email a report to flashrom@flashrom.org if any of the above operations
work correctly for you with this flash chip. Please include the flashrom log
file for all operations you tested (see the man page for details), and mention
which mainboard or programmer you tested in the subject line.
Thanks for your help!
Block protection is disabled.
Reading flash... done.