diff --git a/ichspi.c b/ichspi.c
index a087a0b..7334db7 100644
--- a/ichspi.c
+++ b/ichspi.c
@@ -46,6 +46,8 @@
 #define ICH9_REG_FADDR         0x08	/* 32 Bits */
 #define ICH9_REG_FDATA0                0x10	/* 64 Bytes */
 
+#define ICH9_REG_FRAP          0x50	/* 32 bits */
+
 #define ICH9_REG_SSFS          0x90	/* 08 Bits */
 #define SSFS_SCIP		0x00000001
 #define SSFS_CDS		0x00000004
@@ -966,7 +968,7 @@ static void do_ich9_spi_frap(uint32_t frap, int i)
 
 	base  = ICH_FREG_BASE(freg);
 	limit = ICH_FREG_LIMIT(freg);
-	if (base == 0x1fff && limit == 0) {
+	if ((base == 0xfff || base == 0x1fff) && limit == 0) {
 		/* this FREG is disabled */
 		msg_pdbg("%s region is unused.\n", region_names[i]);
 		return;
@@ -1060,6 +1062,10 @@ int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb,
 		msg_pdbg("AEL %i, ", (tmp2 >> 2) & 1);
 		msg_pdbg("FCERR %i, ", (tmp2 >> 1) & 1);
 		msg_pdbg("FDONE %i\n", (tmp2 >> 0) & 1);
+		if (tmp2 & (1 << 15)) {
+			msg_pinfo("WARNING: SPI Configuration Lockdown activated.\n");
+			ichspi_lock = 1;
+		}
 
 		tmp = mmio_readl(ich_spibar + 0x50);
 		msg_pdbg("0x50: 0x%08x (FRAP)\n", tmp);
@@ -1072,6 +1078,12 @@ int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb,
 		for(i = 0; i < 5; i++)
 			do_ich9_spi_frap(tmp, i);
 
+		if ((tmp & 0x1f1f) != 0x1f1f && ichspi_lock == 0) {
+			msg_pdbg("Enabling full access to all Flash Regions...  ");
+			REGWRITE32(ICH9_REG_FRAP, tmp | 0x1f1f);
+			msg_pdbg((REGREAD32(ICH9_REG_FRAP) & 0x1f1f) == 0x1f1f ? "OK\n" : "failed!\n");
+		}
+
 		msg_pdbg("0x74: 0x%08x (PR0)\n",
 			     mmio_readl(ich_spibar + 0x74));
 		msg_pdbg("0x78: 0x%08x (PR1)\n",
@@ -1097,10 +1109,6 @@ int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb,
 			     ichspi_bbar);
 		msg_pdbg("0xB0: 0x%08x (FDOC)\n",
 			     mmio_readl(ich_spibar + 0xB0));
-		if (tmp2 & (1 << 15)) {
-			msg_pinfo("WARNING: SPI Configuration Lockdown activated.\n");
-			ichspi_lock = 1;
-		}
 		ich_init_opcodes();
 		break;
 	default: