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For these two (printlock and unlock), you need to pick the function
which handles the highest BP bit that chip supports. In your example,
if a chip supports bits BP0-BP4 the correct functions are those with
BP4 in the name. So you did it all right.

If the chip supports write protection, you also need to set .reg_bits
in chip definition. For this you need to have a look at struct
reg_bit_map in include/flash.h, it has comments on what each bit in
the struct means.


On Fri, Mar 22, 2024 at 7:22 AM Vlim <vlim@gigadevice.com> wrote:
>
> Thanks, Anastasia,
>
> Can you please explain this statement,
>
> .printlock  = SPI_PRETTYPRINT_STATUS_REGISTER_BP4_SRWD,
> .unlock     = SPI_DISABLE_BLOCKPROTECT_BP4_SRWD,
>
> Looks like this is to support memory array protection. But it needs BP0-BP4.
> Do I need to specify BP0 to BP3 as well?
> Or I specify the setting when I initiate the flashrom programming command?
>
> Regards,
>
> Victor
>
> ________________________________
> From: Anastasia Klimchuk <aklm@chromium.org>
> Sent: Thursday, March 21, 2024 05:32
> To: Vlim <vlim@gigadevice.com>; flashrom@flashrom.org <flashrom@flashrom.org>
> Cc: Peter Marheine <pmarheine@chromium.org>
> Subject: [flashrom] Re: adding part #
>
> You don't often get email from aklm@chromium.org. Learn why this is important
> 此为外部邮件，谨防钓鱼邮件，请注意邮件是否涉及敏感信息
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> Hello Victor,
>
> Various feature bits are defined as macros in include/flash.h , some of them have comments explaining what they do. If the feature name is not descriptive, and there is no comment, but you think you might need this feature: feel free to ask. I would try to add comments later.
>
> SPI_DISABLE_BLOCKPROTECT_BP4_SRWD and other unlock functions as in spi25_statusreg.c. Those functions have comments, hopefully this can help!
>
> On Thu, Mar 21, 2024 at 2:48 PM Vlim <vlim@gigadevice.com> wrote:
>
> Thanks, Peter,
>
> Where can I find the definition of terms like,
>
> .feature_bits     = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_WRSR_EXT2,
> SPI_DISABLE_BLOCKPROTECT_BP4_SRWD
>
> Regards,
>
> Victor
>
>
> ________________________________
> From: Peter Marheine <pmarheine@chromium.org>
> Sent: Tuesday, March 19, 2024 15:42
> To: Vlim <vlim@gigadevice.com>
> Cc: flashrom@flashrom.org <flashrom@flashrom.org>
> Subject: Re: [flashrom] adding part #
>
> You don't often get email from pmarheine@chromium.org. Learn why this is important
> 此为外部邮件，谨防钓鱼邮件，请注意邮件是否涉及敏感信息
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> Our "how to add a new chip" documentation should point you in the right direction: https://apc01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fflashrom.org%2Fcontrib_howtos%2Fhow_to_add_new_chip.html&data=05%7C02%7Cvlim%40gigadevice.com%7C31a78e769570487649c708dc4a39ec13%7Cf84ba339959c4ab19b671e43414f945e%7C0%7C0%7C638466859887596067%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C0%7C%7C%7C&sdata=tXJGDjwGt2OW%2BV6nlso1HtFvwnCP%2Bo%2FrWYI7ESsest0%3D&reserved=0
>
> But feel free to ask further questions if anything there doesn't seem sufficient for your needs.
>
> On Wed, Mar 20, 2024 at 6:31 AM Vlim <vlim@gigadevice.com> wrote:
>
> Hi, FlashRom team,
>
> I am the FAE director in Gigadevice and I would like to add some part #s to the flashchip.c and flashchip.h.
> Can you please provide some guidance?
>
> Regards,
>
> Victor Lim
> FAE Director
> GigaDevice Semiconductor
> 4088833856
>
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>
>
>
> --
> Anastasia.



--
Anastasia.