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Today's Topics:
1. Re: [PATCH] 4 byte address mode for Macronix MX25L25735F
(Peter Martini)
2. Re: VT6421 sata card with sst39Vf512 eprom
(Antonio Estrada Respeto)
3. Re: MX25L6445E erase and write failed! (The Raven)
4. Adding support for MX25L6455EMI (The Raven)
5. Adding some functionality to the FTDI driver
(Salvador Eduardo Tropea)
----------------------------------------------------------------------
Message: 1
Date: Tue, 5 Apr 2016 05:06:56 -0400
From: Peter Martini <petercmartini@gmail.com>
To: Tim Chick <Tim.Chick@mediatek.com>
Cc: David Hendricks <dhendrix@google.com>, "flashrom@flashrom.org"
<flashrom@flashrom.org>
Subject: Re: [flashrom] [PATCH] 4 byte address mode for Macronix
MX25L25735F
Message-ID:
<CAFyW6MS_YkaA2_wM2H8RCeSHK2xDAFjEdCFyHv55_+TtMdw+NA@mail.gmail.com>
Content-Type: text/plain; charset="utf-8"
Hi all,
I'd asked about support for the MX25L25635E earlier on this list [
https://www.flashrom.org/pipermail/flashrom/2015-September/013855.html],
and have confirmed with the patches referenced there that I can read and
flash my chip. I'll try this patch tonight when I get home and report
back; I'd love to see this support main-lined.
Peter
On Tue, Apr 5, 2016 at 3:18 AM, Tim Chick <Tim.Chick@mediatek.com> wrote:
> Hi David,
>
>
>
> There was a mistake in the logic, which I have corrected.
>
>
>
> I was also asked by someone else on the list if it worked with the
> MX25L25635F, which is 32Mbytes, but uses 3-byte addressing by default.
>
>
>
> So I made the attached changes, which switch the chip to 4-byte mode. It
> also has some dedicated 4-byte commands, and a BAR register, but it seemed
> easiest to just use what I had tested for the MX25L25735F. I can?t actually
> test the MX25L25635F though, as I don?t have one.
>
>
>
> Thanks,
> Tim
>
>
>
>
>
> *From:* David Hendricks [mailto:dhendrix@google.com]
> *Sent:* 04 April 2016 23:21
> *To:* Tim Chick
> *Cc:* flashrom@flashrom.org
> *Subject:* Re: [flashrom] [PATCH] 4 byte address mode for Macronix
> MX25L25735F
>
>
>
> On Thu, Mar 31, 2016 at 8:21 AM, Tim Chick <Tim.Chick@mediatek.com> wrote:
>
> Hi List,
>
>
>
> Flashrom would not detect this chip. When the definition was added,
> everything failed as the chip only supports 4 byte address operation.
>
>
>
> Interesting - I didn't know such chips existed. The ones I've used have
> backwards-compatible commands that support 3-byte addresses. FYI - Some
> other high-capacity chips have 4-byte address enable bit in a config
> register that will make the usual read/write/erase instructions accept 4
> byte addresses. And yet other large chips have alternative instructions
> that function the same but only accept a 4-byte address.
>
>
>
> The attached patch adds 4 byte address support for 4 byte only chips, as
> determined by the JEDEC flash parameter table, and support for this chip
> specifically.
>
>
>
> I?ve only allowed it to work with the SPI_CONTROLLER_FT2232 controller, as
> that is the only one I have to test.
>
>
>
> I?ve also only ported spi_block_erase_20 ? the other block erase functions
> will fail.
>
>
>
> Please let me know what you think!
>
>
>
> Good stuff! FWIW, I have a work-in-progress patch on chromium.org (
> https://chromium-review.googlesource.com/#/c/323359/) for the other types
> of high-capacity flash chips. I've tested on a Spansion S25FS256 using
> linux_spi and ft2232. It needs a lot of clean-up, but might be of help.
> Most of the changes were to convert read/write/erase functions to use
> allocated buffers whose length depends on whether we're using a 3- or
> 4-byte address.
>
>
>
> I'll borrow some ideas from your patch as well to support the "4-byte
> address only" chips.
>
>
>
> --
>
> David Hendricks (dhendrix)
> Systems Software Engineer, Google Inc.
>
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------------------------------
Message: 2
Date: Tue, 5 Apr 2016 14:01:43 +0200
From: "Antonio Estrada Respeto" <aestradarespeto@gmail.com>
To: <flashrom@flashrom.org>
Subject: Re: [flashrom] VT6421 sata card with sst39Vf512 eprom
Message-ID: <6FBFE9CEFEF54581B7BA6A024BA7C6B3@Asrock960gm>
Content-Type: text/plain; format=flowed; charset="UTF-8";
reply-type=original
Thank you for your support.
I have tried to take the output file as you request, but no luck. I always
start freedos in my usb sdcard boot choosing the number 3 option, then input
cswdpr0, and then execute flashrom comand. But if I try to make -o
logfilename.txt, the system refuses to save the file (it says that the file
does not exists). If I do not execute cswdpr0 at first time, always have a
disk write error. I suppose it will be related to the file log error.
-----Mensaje original-----
From: Stefan Tauner
Sent: Monday, April 04, 2016 8:24 PM
To: Antonio Estrada Respeto
Cc: flashrom@flashrom.org
Subject: Re: [flashrom] VT6421 sata card with sst39Vf512 eprom
On Mon, 4 Apr 2016 14:01:35 +0200
"Antonio Estrada Respeto" <aestradarespeto@gmail.com> wrote:
> I have tried the below flashrom option (code tested) in order to find a
> right response on my no name VT6421A pci sata card, but no luck.
> Environment is Freedos in an usb boot sdcard device in a standard PC.
> Address was from 0xffff0000 to others. The card is found by flashrom at
> 1106:3249 BDF 02:0b.0 . The card has an Eprom flashable sst39Vf512 at is
> printed in top of it. Final messages are:
>
> Requested bar is of type rom.
> Error: No suported PCI found.
> Error: Program initialization failed.
>
>
> I managed flashrom to work with my 3C905TX and do it in the same
> environment as a charm. I know VT6421A hardware is very tricky depending
> on every pci maker. The final goal is to flash a 64k boot rom ins this
> card. Any help will be wellcome.
>
> Thanks in advance.
>
> The code tested:
>
> flashrom ?p atavia offset=(different address) ?V
Please post a log file. You can generate it with "-o logfilename.txt".
--
Kind regards/Mit freundlichen Gr??en, Stefan Tauner
------------------------------
Message: 3
Date: Tue, 5 Apr 2016 14:57:26 +0200
From: The Raven <originalraven@hotmail.com>
To: Urja Rannikko <urjaman@gmail.com>, flashrom@flashrom.org
Subject: Re: [flashrom] MX25L6445E erase and write failed!
Message-ID: <BLU437-SMTP994D4E3F5AD35128DA7899B89E0@phx.gbl>
Content-Type: text/plain; charset="utf-8"
Hi again
I think the problem was that this (my) chips are defective. :-(
Tested now some of them and only two are not working as they should.
So i think this case can be closed.
THX
------------------------------
Message: 4
Date: Tue, 5 Apr 2016 16:47:42 +0200
From: The Raven <originalraven@hotmail.com>
To: flashrom@flashrom.org
Subject: [flashrom] Adding support for MX25L6455EMI
Message-ID: <BLU437-SMTP39870E76A80C056D9BDA0DB89E0@phx.gbl>
Content-Type: text/plain; charset="iso-8859-15"
Hi
I have two of those chips and added support for them.
This chip looks similar to the "MX25L6406E", so i took this part of code
and modified it to fit the MX25L6455EMI.
I have tested all erase modes (logs available if needed).
spi_block_erase_20
spi_block_erase_52
spi_block_erase_d8
spi_block_erase_60
spi_block_erase_c7
I am not a coder and it's years ago since my last patch. So sorry for
not posting a patch. :-(
Here are my modifications (are the correct?):
File flashchips.h
#define MACRONIX_MX25L6455EMI 0x2617 /* MX25L6455EMI (4k 0x20) */
File flashchips.c
{
.vendor = "Macronix",
.name = "MX25L6455EMI",
.bustype = BUS_SPI,
.manufacture_id = MACRONIX_ID,
.model_id = MACRONIX_MX25L6455EMI,
.total_size = 8192,
.page_size = 256,
.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP,
.tested = TEST_OK_PREW,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
.block_erasers =
{
{
.eraseblocks = { {4 * 1024, 2048} },
.block_erase = spi_block_erase_20,
}, {
.eraseblocks = { {64 * 1024, 128} },
.block_erase = spi_block_erase_52,
}, {
.eraseblocks = { {64 * 1024, 128} },
.block_erase = spi_block_erase_d8,
}, {
.eraseblocks = { {8 * 1024 * 1024, 1} },
.block_erase = spi_block_erase_60,
}, {
.eraseblocks = { {8 * 1024 * 1024, 1} },
.block_erase = spi_block_erase_c7,
}
},
.printlock = spi_prettyprint_status_register_bp3_srwd,
.unlock = spi_disable_blockprotect_bp3_srwd,
.write = spi_chip_write_256,
.read = spi_chip_read, /* Fast read (0x0B), dual I/O read
supported */
.voltage = {2700, 3600},
},
------------------------------
Message: 5
Date: Tue, 5 Apr 2016 13:50:02 -0300
From: Salvador Eduardo Tropea <salvador@inti.gob.ar>
To: flashrom@flashrom.org
Subject: [flashrom] Adding some functionality to the FTDI driver
Message-ID: <5703ECBA.7000809@inti.gob.ar>
Content-Type: text/plain; charset=windows-1252; format=flowed
Hi!
flashrom is a very nice tool. I'm using it to configure Lattice iCE40
FPGAs. These FPGAs uses an SPI configuration memory (M25P10-A in my case).
To communicate with the flash I'm using an FTDI 2232H cable (my own
version, supports 0.9 to 5 V signals).
The software provided by Lattice works. But I had problems with the
command line version of the tool (the GUI is fine).
So I searched for solutions and found flashrom.
I was able to flash the chip and start the FPGA without problems.
Flashrom is really fast and very easy to use.
Now I want to avoid some annoying details, and I thought about adding a
couple of new options to flashrom.
My problem is that I need to control a system reset line. I can't access
the SPI flash if the FPGA isn't in reset state (is directly connected to
the SPI flash).
It means that I must assert the reset line, do all the flashrom stuff
and then deassert reset. This is quite easy to implement. In fact I
could add a new "cable" to the ftdi.c file. But this won't solve similar
problems. So I was thinking about adding options to the FTDI driver to
control the initial and final state of the FTDI I/O lines. This is a
little bit more complex, but will add support for a lot of situations.
So my questions are:
1) Is this kind of addition desired.
2) Which way is preferred? simple/limited, complex/versatile.
Regards, SET
--
Ing. Salvador Eduardo Tropea http://utic.inti.gob.ar/
INTI - Micro y Nanoelectr?nica (CMNB) http://www.inti.gob.ar/
Unidad T?cnica Sistemas Inteligentes Av. General Paz 5445
Tel: (+54 11) 4724 6300 ext. 6919 San Mart?n - B1650KNA
FAX: (+54 11) 4754 5194 Buenos Aires * Argentina
------------------------------
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