Jan Samek has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/42805 )
Change subject: chipset_enable: add PCI ID for APL-I (Broxton) ......................................................................
chipset_enable: add PCI ID for APL-I (Broxton)
Change-Id: I48dba541b5893551f47f3d5ed422eb1dc36f5324 Signed-off-by: Jan Samek jan.samek@siemens.com Signed-off-by: Henning Schild henning.schild@siemens.com --- M chipset_enable.c 1 file changed, 1 insertion(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/05/42805/1
diff --git a/chipset_enable.c b/chipset_enable.c index 632679c..d56a547 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -2052,6 +2052,7 @@ {0x8086, 0xa2c9, B_S, NT, "Intel", "Z370", enable_flash_pch100}, {0x8086, 0xa2d2, B_S, NT, "Intel", "X299", enable_flash_pch100}, {0x8086, 0x5ae8, B_S, DEP, "Intel", "Apollo Lake", enable_flash_apl}, + {0x8086, 0x5af0, B_S, DEP, "Intel", "Apollo Lake", enable_flash_apl}, {0x8086, 0xa303, B_S, NT, "Intel", "H310", enable_flash_pch300}, {0x8086, 0xa304, B_S, NT, "Intel", "H370", enable_flash_pch300}, {0x8086, 0xa305, B_S, NT, "Intel", "Z390", enable_flash_pch300},
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/42805 )
Change subject: chipset_enable: add PCI ID for APL-I (Broxton) ......................................................................
Patch Set 1: Code-Review+1
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/42805 )
Change subject: chipset_enable: add PCI ID for APL-I (Broxton) ......................................................................
Patch Set 1: Code-Review+2
Angel Pons has submitted this change. ( https://review.coreboot.org/c/flashrom/+/42805 )
Change subject: chipset_enable: add PCI ID for APL-I (Broxton) ......................................................................
chipset_enable: add PCI ID for APL-I (Broxton)
Change-Id: I48dba541b5893551f47f3d5ed422eb1dc36f5324 Signed-off-by: Jan Samek jan.samek@siemens.com Signed-off-by: Henning Schild henning.schild@siemens.com Reviewed-on: https://review.coreboot.org/c/flashrom/+/42805 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Paul Menzel paulepanter@users.sourceforge.net Reviewed-by: Angel Pons th3fanbus@gmail.com --- M chipset_enable.c 1 file changed, 1 insertion(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Paul Menzel: Looks good to me, but someone else must approve Angel Pons: Looks good to me, approved
diff --git a/chipset_enable.c b/chipset_enable.c index 632679c..d56a547 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -2052,6 +2052,7 @@ {0x8086, 0xa2c9, B_S, NT, "Intel", "Z370", enable_flash_pch100}, {0x8086, 0xa2d2, B_S, NT, "Intel", "X299", enable_flash_pch100}, {0x8086, 0x5ae8, B_S, DEP, "Intel", "Apollo Lake", enable_flash_apl}, + {0x8086, 0x5af0, B_S, DEP, "Intel", "Apollo Lake", enable_flash_apl}, {0x8086, 0xa303, B_S, NT, "Intel", "H310", enable_flash_pch300}, {0x8086, 0xa304, B_S, NT, "Intel", "H370", enable_flash_pch300}, {0x8086, 0xa305, B_S, NT, "Intel", "Z390", enable_flash_pch300},
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Angel Pons (Code Review) -
Jan Samek (Code Review)
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Paul Menzel (Code Review)