Alan Green has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/34533 )
Change subject: flashchips.c: Mark Intel 82802AB as TEST_OK_PREW ......................................................................
flashchips.c: Mark Intel 82802AB as TEST_OK_PREW
Intel 82802AB Was marked as TEST_OK_PREW in the Chromium fork in their SHA312d9ff1fb1ccb5533a867d4248eb1be95ec3fbc. The definitions in the fork and here in upstream are otherwise substantially similar.
Signed-off-by: Alan Green avg@google.com Change-Id: Iec75f0b1c35000308601fa6fdd63ab1738d0ef94 --- M flashchips.c 1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/33/34533/1
diff --git a/flashchips.c b/flashchips.c index 166af6a..b859bf6 100644 --- a/flashchips.c +++ b/flashchips.c @@ -7671,7 +7671,7 @@ .total_size = 512, .page_size = 64 * 1024, .feature_bits = FEATURE_REGISTERMAP, - .tested = TEST_OK_PR, + .tested = TEST_OK_PREW, .probe = probe_82802ab, .probe_timing = TIMING_IGNORED, /* routine does not use probe_timing (82802ab.c) */ .block_erasers =
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/34533
to look at the new patch set (#2).
Change subject: flashchips.c: Mark Intel 82802AB as TEST_OK_PREW ......................................................................
flashchips.c: Mark Intel 82802AB as TEST_OK_PREW
Intel 82802AB Was marked as TEST_OK_PREW in the Chromium fork in their SHA312d9ff1fb1ccb5533a867d4248eb1be95ec3fbc. The definitions in the fork and here in upstream are otherwise substantially similar.
There are no other downstream changes for Intel chips to be upstreamed.
Signed-off-by: Alan Green avg@google.com Change-Id: Iec75f0b1c35000308601fa6fdd63ab1738d0ef94 --- M flashchips.c 1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/33/34533/2
Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/34533 )
Change subject: flashchips.c: Mark Intel 82802AB as TEST_OK_PREW ......................................................................
Patch Set 2: Code-Review+2
Stefan Reinauer has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/34533 )
Change subject: flashchips.c: Mark Intel 82802AB as TEST_OK_PREW ......................................................................
Patch Set 2: Verified+1
Nico Huber has submitted this change and it was merged. ( https://review.coreboot.org/c/flashrom/+/34533 )
Change subject: flashchips.c: Mark Intel 82802AB as TEST_OK_PREW ......................................................................
flashchips.c: Mark Intel 82802AB as TEST_OK_PREW
Intel 82802AB Was marked as TEST_OK_PREW in the Chromium fork in their SHA312d9ff1fb1ccb5533a867d4248eb1be95ec3fbc. The definitions in the fork and here in upstream are otherwise substantially similar.
There are no other downstream changes for Intel chips to be upstreamed.
Signed-off-by: Alan Green avg@google.com Change-Id: Iec75f0b1c35000308601fa6fdd63ab1738d0ef94 Reviewed-on: https://review.coreboot.org/c/flashrom/+/34533 Reviewed-by: Edward O'Callaghan quasisec@chromium.org Tested-by: Stefan Reinauer stefan.reinauer@coreboot.org --- M flashchips.c 1 file changed, 1 insertion(+), 1 deletion(-)
Approvals: Stefan Reinauer: Verified Edward O'Callaghan: Looks good to me, approved
diff --git a/flashchips.c b/flashchips.c index 166af6a..b859bf6 100644 --- a/flashchips.c +++ b/flashchips.c @@ -7671,7 +7671,7 @@ .total_size = 512, .page_size = 64 * 1024, .feature_bits = FEATURE_REGISTERMAP, - .tested = TEST_OK_PR, + .tested = TEST_OK_PREW, .probe = probe_82802ab, .probe_timing = TIMING_IGNORED, /* routine does not use probe_timing (82802ab.c) */ .block_erasers =
-
Alan Green (Code Review) -
Edward O'Callaghan (Code Review)
-
Nico Huber (Code Review)
-
Stefan Reinauer (Code Review)