Change in flashrom[master]: bitbang_spi: Add functions to optimize xfers

[Daniel Thompson (Code Review)]

Daniel Thompson has posted comments on this change. ( https://review.coreboot.org/26946 )

Change subject: bitbang_spi: Add functions to optimize xfers
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Patch Set 2:

(1 comment)

https://review.coreboot.org/#/c/26946/2/bitbang_spi.c
File bitbang_spi.c:

https://review.coreboot.org/#/c/26946/2/bitbang_spi.c@157
PS2, Line 157: 	bitbang_spi_set_sck(master, 0);
> I didn't mean to change it to further optimize but to correct it. […]
> I did spend some time on the page... but I don't recall studying the timing diagram much. I spent my time trying to decode the bulletted text describing CPHA=0 and CPHA=1 (and wishing there was a real standard to look at).

Regarding what CPHA=0 means, there's some additional text describing the first bit: "For the first cycle, the first bit must be on the MOSI line before the leading clock edge.". To be honest I suspect this phrasing is a little loose since "before" is not a sufficient timing constraint. I think it should be "a half period before".

Anyway, the code implements the "half period before" timings so I still haven't seen where it is not correct.



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Gerrit-Project: flashrom
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Gerrit-Change-Id: Ic3430a9df34844cdfa82e109456be788eaa1789a
Gerrit-Change-Number: 26946
Gerrit-PatchSet: 2
Gerrit-Owner: Daniel Thompson <[e-mail]>
Gerrit-Reviewer: Daniel Thompson <[e-mail]>
Gerrit-Reviewer: Idwer Vollering <[e-mail]>
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Gerrit-Reviewer: Patrick Georgi <[e-mail]>
Gerrit-Reviewer: Paul Menzel <[e-mail]>
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Gerrit-Comment-Date: Tue, 26 Jun 2018 19:57:49 +0000
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