Thomas Heijligen submitted this change.

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1 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the submitted one.

Approvals: build bot (Jenkins): Verified Stefan Reinauer: Looks good to me, approved Thomas Heijligen: Looks good to me, approved
jedec.c: Add a little more const correctness

Change-Id: Ic9a76ce3734bd83399c95478a7c0bfc081211124
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/73283
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Thomas Heijligen <src@posteo.de>
---
M jedec.c
1 file changed, 18 insertions(+), 5 deletions(-)

diff --git a/jedec.c b/jedec.c
index 2cdde61..bb617e0 100644
--- a/jedec.c
+++ b/jedec.c
@@ -123,7 +123,7 @@
int probe_jedec_29gl(struct flashctx *flash)
{
const unsigned int mask = getaddrmask(flash->chip);
- chipaddr bios = flash->virtual_memory;
+ const chipaddr bios = flash->virtual_memory;
const struct flashchip *chip = flash->chip;

/* Reset chip to a clean slate */
@@ -381,9 +381,8 @@
unsigned int i;
int failed = 0;
chipaddr dst = flash->virtual_memory + start;
- chipaddr olddst;
+ const chipaddr olddst = dst;

- olddst = dst;
for (i = 0; i < len; i++) {
if (write_byte_program_jedec_common(flash, src, dst))
failed = 1;
@@ -452,8 +451,8 @@
* write_jedec have page_size set to max_writechunk_size, so
* we're OK for now.
*/
- unsigned int page_size = flash->chip->page_size;
- unsigned int nwrites = (start + len - 1) / page_size;
+ const unsigned int page_size = flash->chip->page_size;
+ const unsigned int nwrites = (start + len - 1) / page_size;

/* Warning: This loop has a very unusual condition and body.
* The loop needs to go through each page with at least one affected

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Gerrit-Project: flashrom
Gerrit-Branch: master
Gerrit-Change-Id: Ic9a76ce3734bd83399c95478a7c0bfc081211124
Gerrit-Change-Number: 73283
Gerrit-PatchSet: 3
Gerrit-Owner: Edward O'Callaghan <quasisec@chromium.org>
Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer@coreboot.org>
Gerrit-Reviewer: Thomas Heijligen <src@posteo.de>
Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org>
Gerrit-MessageType: merged