Michał Kopeć has uploaded this change for review.

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chipset_enable.c: Mark Intel B150 and Q170 as tested

Mark both B150 and Q170 as tested (DEP, as writability depends on the
flash descriptor). B150 was found in a ThinkCentre M700 Tiny, and Q170
in a ThinkCentre M900 Tiny, both support internal flashing once coreboot
is flashed (and coreboot SPI flash lockdown is not enabled).

Change-Id: Iedf4c77e3228628ac1a8726c1a9b4fb733d63d40
Signed-off-by: Michał Kopeć <michal.kopec@3mdeb.com>
---
M chipset_enable.c
1 file changed, 2 insertions(+), 2 deletions(-)

git pull ssh://review.coreboot.org:29418/flashrom refs/changes/45/87045/1

diff --git a/chipset_enable.c b/chipset_enable.c
index ed53702..4a34f32 100644
--- a/chipset_enable.c
+++ b/chipset_enable.c
@@ -2115,9 +2115,9 @@
 	{0x8086, 0xa143, B_S,    DEP, "Intel", "H110",				enable_flash_pch100},
 	{0x8086, 0xa144, B_S,    NT,  "Intel", "H170",				enable_flash_pch100},
 	{0x8086, 0xa145, B_S,    NT,  "Intel", "Z170",				enable_flash_pch100},
-	{0x8086, 0xa146, B_S,    NT,  "Intel", "Q170",				enable_flash_pch100},
+	{0x8086, 0xa146, B_S,    DEP, "Intel", "Q170",				enable_flash_pch100},
 	{0x8086, 0xa147, B_S,    NT,  "Intel", "Q150",				enable_flash_pch100},
-	{0x8086, 0xa148, B_S,    NT,  "Intel", "B150",				enable_flash_pch100},
+	{0x8086, 0xa148, B_S,    DEP, "Intel", "B150",				enable_flash_pch100},
 	{0x8086, 0xa149, B_S,    NT,  "Intel", "C236",				enable_flash_pch100},
 	{0x8086, 0xa14a, B_S,    NT,  "Intel", "C232",				enable_flash_pch100},
 	{0x8086, 0xa14b, B_S,    NT,  "Intel", "Sunrise Point Server Sample",	enable_flash_pch100},

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