Attention is currently required from: Anastasia Klimchuk, Hsuan Ting Chen, Subrata Banik.

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3 comments:

• Commit Message:

  • Patch Set #12, Line 26:

    TEST=On MTL, use flashrom -VV to see correct FREG9 access
    TEST=On ADL, use flashrom -VV to see not break anything
    TEST=On APL, use flashrom -VV to see not break anything
    

    Would you mind running the test scenarious again on the latest version of code? Thank you!

    Yes, I checked it on MTL and APL again when I submitted the code.

• File ichspi.c:

  • Patch Set #10, Line 1853: mmio_readw

    Thanks as usual for giving all details! appreciate it. […]

    ICH_BRRA and ICH_BRWA are designed to be at most 8 bits, also we have a mask:

    ```
    #define ICH_BRWA(x) ((x >> 8) & 0xff)
    #define ICH_BRRA(x) ((x >> 0) & 0xff)
    ```

    So they should always fit in 8 bits. (uint8_t)

  • Patch Set #10, Line 1876: inline

    I am thinking from the other side: are there any reasons we should explicitly say it needs to be inl […]

    Yes, and I believe that this short static would possibly inline it by default.

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