Nico Huber uploaded patch set #2 to this change.

View Change

chipset_enable: Add support for discrete Cannon Lake PCHs

The Cannon Lake "300 Series" PCHs [1,2] share the register layout of the
Skylake "100 Series". Mark them as BAD until `ichspi.c` is adapted.

[1] Intel(R) 300 Series and Intel(R) C240 Series
    Chipset Family Platform Controller Hub
    Datasheet - Volume 1 of 2
    Revison 4 (Dec 2018)
    Document Number 337347

[2] Intel(R) 300 Series Chipset Families Platform Controller Hub
    Datasheet - Volume 2 of 2
    Revision 2? (Oct 2018)
    Document Number 337348

Change-Id: If0b54799d5b93169ee660409bad57ae14677340c
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Signed-off-by: Nico Huber <nico.huber@secunet.com>
---
M chipset_enable.c
M programmer.h
2 files changed, 19 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/flashrom refs/changes/71/34071/2

To view, visit change 34071. To unsubscribe, or for help writing mail filters, visit settings.