Thomas Heijligen has uploaded this change for review.
spi.c: Add AT45 & SF25F erasefn opcode mapping
Change-Id: I798a91f1e20b63662715c68e6d43d03fc6005d51
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
---
M include/chipdrivers.h
M spi.c
2 files changed, 56 insertions(+), 18 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/17/67717/1
diff --git a/include/chipdrivers.h b/include/chipdrivers.h
index 4027072..9a7e663 100644
--- a/include/chipdrivers.h
+++ b/include/chipdrivers.h
@@ -53,7 +53,7 @@
int spi_block_erase_db(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
int spi_block_erase_dc(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
erasefunc_t *spi25_get_erasefn_from_opcode(uint8_t opcode);
-uint8_t spi_get_opcode_from_erasefn(erasefunc_t *func);
+const uint8_t *spi_get_opcode_from_erasefn(erasefunc_t *func);
int spi_chip_write_1(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len);
int spi_nbyte_read(struct flashctx *flash, unsigned int addr, uint8_t *bytes, unsigned int len);
int spi_read_chunked(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len, unsigned int chunksize);
diff --git a/spi.c b/spi.c
index 124b296..271be1d 100644
--- a/spi.c
+++ b/spi.c
@@ -168,28 +168,56 @@
return register_master(&rmst);
}
+/*
+ * The following array has erasefn and opcode list pair. The opcode list pair is
+ * 0 termintated and must have size one more than the maximum number of opcodes
+ * used by any erasefn. Also the opcodes must be in increasing order.
+ */
static const struct {
erasefunc_t *func;
- uint8_t opcode;
+ uint8_t opcode[3]; /* two opcodes + 0 termination */
} function_opcode_list[] = {
- {&spi_block_erase_20, 0x20},
- {&spi_block_erase_21, 0x21},
- {&spi_block_erase_50, 0x50},
- {&spi_block_erase_52, 0x52},
- {&spi_block_erase_53, 0x53},
- {&spi_block_erase_5c, 0x5c},
- {&spi_block_erase_60, 0x60},
- {&spi_block_erase_62, 0x62},
- {&spi_block_erase_81, 0x81},
- {&spi_block_erase_c4, 0xc4},
- {&spi_block_erase_c7, 0xc7},
- {&spi_block_erase_d7, 0xd7},
- {&spi_block_erase_d8, 0xd8},
- {&spi_block_erase_db, 0xdb},
- {&spi_block_erase_dc, 0xdc},
+ {&spi_block_erase_20, {0x20}},
+ {&spi_block_erase_21, {0x21}},
+ {&spi_block_erase_50, {0x50}},
+ {&spi_block_erase_52, {0x52}},
+ {&spi_block_erase_53, {0x53}},
+ {&spi_block_erase_5c, {0x5c}},
+ {&spi_block_erase_60, {0x60}},
+ {&spi_block_erase_62, {0x62}},
+ {&spi_block_erase_81, {0x81}},
+ {&spi_block_erase_c4, {0xc4}},
+ {&spi_block_erase_c7, {0xc7}},
+ {&spi_block_erase_d7, {0xd7}},
+ {&spi_block_erase_d8, {0xd8}},
+ {&spi_block_erase_db, {0xdb}},
+ {&spi_block_erase_dc, {0xdc}},
+ //AT45CS1282
+ {&spi_erase_at45cs_sector, {0x50, 0x7c, 0}},
+ //AT45DB**
+ {&spi_erase_at45db_page, {0x81}},
+ {&spi_erase_at45db_block, {0x50}},
+ {&spi_erase_at45db_sector, {0x7c}},
+ {&spi_erase_at45db_chip, {0xc7}},
+ //SF25F**
+ {&s25fl_block_erase, {0xdc}},
+ {&s25fs_block_erase_d8, {0xd8}},
};
-uint8_t spi_get_opcode_from_erasefn(erasefunc_t *func)
+/*
+ * @brief Get erase function pointer from passed opcode list.
+ *
+ * Get the pointer to the erase function which uses passed opcodes and is used
+ * by the passed flashcip. The passed opcode_list must have opcodes in
+ * increasing order.
+ *
+ * @param chip Pointer to the flashchip structure.
+ * @param opcode_list Pointer to the array of opcodes.
+ * @param opcode_count Number of opcodes in 'opcode_list'
+ *
+ * @result Pointer to erase function matching 'chip' and 'opcode_list' or NULL on failure
+ */
+const uint8_t *spi_get_opcode_from_erasefn(erasefunc_t *func)
{
size_t i;
for (i = 0; i < ARRAY_SIZE(function_opcode_list); i++) {
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