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2 comments:

• Commit Message:

  • Patch Set #1, Line 9: Quad I/O is off

    QE (quad enable) bit is off by default (can be enabled though)

    How that compares to other versions is a bit more complex:

    FV..G (QE=0), FV..F (QE=0), JV...Q (QE=1, wtf) use 0x40 prefix
    FV..Q (QE=1) uses 0x60 prefix
    JV...M (QE=0) uses 0x70 prefix

    AFAICS

• File flashchips.c:

  • Patch Set #1, Line 17101: FEATURE_WRSR_WREN

    I think we should use `FEATURE_WRSR_EWSR` instead. It seems the chip
    supports both. But if we use WREN, changes are non-volatile. Also, I
    guess with only one of three status registers barely supported by
    .printlock and .unlock, it doesn't make much of a difference.

    Please test.

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