Nico Huber uploaded patch set #3 to this change.

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chipset_enable: Add PCI IDs for discrete Kaby Lake PCHs

The Kaby Lake "200 Series" PCHs [1,2] share the register layout of their
Skylake "100 Series" siblings.

[1] Intel® 200 Series (including X299) and Intel® Z370 Series
Chipset Families Platform Controller Hub (PCH)
Datasheet - Volume 1 of 2
Revision 003
Document Number 335192

[2] Intel® 200 Series (including X299) Chipset Family Platform
Controller Hub (PCH)
Datasheet - Volume 2 of 2
Revision 003
Document Number 335193

Change-Id: Ida545d69ec998a5d3ae4dc88e76adbb13952bceb
Signed-off-by: Nico Huber <nico.h@gmx.de>
---
M chipset_enable.c
1 file changed, 7 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/flashrom refs/changes/32/26232/3

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Gerrit-Project: flashrom
Gerrit-Branch: master
Gerrit-MessageType: newpatchset
Gerrit-Change-Id: Ida545d69ec998a5d3ae4dc88e76adbb13952bceb
Gerrit-Change-Number: 26232
Gerrit-PatchSet: 3
Gerrit-Owner: Nico Huber <nico.h@gmx.de>
Gerrit-Reviewer: David Hendricks <david.hendricks@gmail.com>
Gerrit-Reviewer: Paul Menzel <paulepanter@users.sourceforge.net>
Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org>