Khoa Hoang has uploaded this change for review.

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flashchips.c: Add write protect support for W25Q16.V

Enable WRSR2 feature flag and define reg_bits and decode_range for
W25Q16.V to enable write protect support.

Change-Id: I6c0b35f82b47a1169bccfd08222e9e3b3be30d75
Signed-off-by: Khoa Hoang <admin@khoahoang.com>
---
M flashchips.c
1 file changed, 23 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/flashrom refs/changes/13/67713/1

diff --git a/flashchips.c b/flashchips.c
index 47a37ee..82c8882 100644
--- a/flashchips.c
+++ b/flashchips.c
@@ -17506,7 +17506,7 @@
 		.page_size	= 256,
 		/* supports SFDP */
 		/* OTP: 1024B total, 256B reserved; read 0x48; write 0x42, erase 0x44, read ID 0x4B */
-		.feature_bits	= FEATURE_WRSR_WREN | FEATURE_OTP,
+		.feature_bits	= FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_WRSR2,
 		.tested		= TEST_OK_PREW,
 		.probe		= probe_spi_rdid,
 		.probe_timing	= TIMING_ZERO,
@@ -17534,6 +17534,15 @@
 		.write		= spi_chip_write_256,
 		.read		= spi_chip_read,
 		.voltage	= {2700, 3600},
+		.reg_bits	=
+		{
+			.srp    = {STATUS1, 7, RW},
+			.srl    = {STATUS2, 0, RW},
+			.bp     = {{STATUS1, 2, RW}, {STATUS1, 3, RW}, {STATUS1, 4, RW}},
+			.tb     = {STATUS1, 5, RW},
+			.sec    = {STATUS1, 6, RW},
+		},
+		.decode_range	= decode_range_spi25,
 	},
 
 	{

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