Attention is currently required from: Nico Huber, Edward O'Callaghan, Angel Pons, Sergii Dmytruk.
View Change
1 comment:
File spi25_statusreg.c:
Patch Set #21, Line 110:
/* WRSR performs a self-timed erase before the changes take effect.
* This may take 50-85 ms in most cases, and some chips apparently
* allow running RDSR only once. Therefore pick an initial delay of
* 100 ms, then wait in 10 ms steps until a total of 5 s have elapsed.
*/
int i = 0;
programmer_delay(100 * 1000);
while (spi_read_status_register(flash) & SPI_SR_WIP) {
if (++i > 490) {
msg_cerr("Error: WIP bit after WRSR never cleared\n");
return TIMEOUT_ERROR;
}
programmer_delay(10 * 1000);
}
return 0;
This undoes changes to the waiting loop recently made in CB:58475.
Done, thanks!
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Gerrit-Project: flashrom
Gerrit-Branch: master
Gerrit-Change-Id: I4996b0848d0ed09032bad2ab13ab1f40bbfc0304
Gerrit-Change-Number: 59528
Gerrit-PatchSet: 22
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