David Hendricks has uploaded this change for review.
flashchips: Add SST26VF016B(A), SST26VF032B(A), SST26VF064B(A)
This patch seems to have originally been from
https://patchwork.coreboot.org/patch/4126/ . The most recent version
seems to be in OpenEmbedded (commit 503a572) which added support for
16Mbit and 32Mbit variants.
The OpenEmbedded patch also makes changes to linux_spi.c to add some
debug prints which are omitted in this version.
From the original commit message:
Differences between SST26 and SST25:
1. The WREN instruction must be executed prior to WRSR [Section 5.31].
There is no EWSR.
2. Block protection bits are no longer in the status register. There
is a dedicated 144-bit register [Table 5-6]. The device is
write-protected by default. A Global Block-Protection Unlock
command unlocks the entire memory [Section 4.1].
Change-Id: Ib019bed8ce955049703eb3376c32a83ef607c219
Signed-off-by: Wei Hu <wei@aristanetworks.com>
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
---
M chipdrivers.h
M flashchips.c
M flashchips.h
M spi25_statusreg.c
4 files changed, 130 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/62/25962/1
diff --git a/chipdrivers.h b/chipdrivers.h
index af59c30..0ae45f4 100644
--- a/chipdrivers.h
+++ b/chipdrivers.h
@@ -107,6 +107,7 @@
int spi_prettyprint_status_register_sst25(struct flashctx *flash);
int spi_prettyprint_status_register_sst25vf016(struct flashctx *flash);
int spi_prettyprint_status_register_sst25vf040b(struct flashctx *flash);
+int spi_disable_blockprotect_sst26_global_unprotect(struct flashctx *flash);
/* sfdp.c */
int probe_spi_sfdp(struct flashctx *flash);
diff --git a/flashchips.c b/flashchips.c
index 70057d4..86498af 100644
--- a/flashchips.c
+++ b/flashchips.c
@@ -12922,6 +12922,120 @@
{
.vendor = "SST",
+ .name = "SST26VF016B(A)",
+ .bustype = BUS_SPI,
+ .manufacture_id = SST_ID,
+ .model_id = SST_SST26VF016B,
+ .total_size = 2048,
+ .page_size = 256,
+ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP,
+ .tested = TEST_OK_PREW,
+ .probe = probe_spi_rdid,
+ .probe_timing = TIMING_ZERO,
+ .block_erasers =
+ {
+ {
+ .eraseblocks = { {4 * 1024, 512} },
+ .block_erase = spi_block_erase_20,
+ }, {
+ .eraseblocks = {
+ {8 * 1024, 4},
+ {32 * 1024, 1},
+ {64 * 1024, 30},
+ {32 * 1024, 1},
+ {8 * 1024, 4},
+ },
+ .block_erase = spi_block_erase_d8,
+ }, {
+ .eraseblocks = { {2 * 1024 * 1024, 1} },
+ .block_erase = spi_block_erase_c7,
+ },
+ },
+ .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */
+ .unlock = spi_disable_blockprotect_sst26_global_unprotect,
+ .write = spi_chip_write_256, /* Multi I/O supported */
+ .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */
+ .voltage = {2700, 3600},
+ },
+ {
+ .vendor = "SST",
+ .name = "SST26VF032B(A)",
+ .bustype = BUS_SPI,
+ .manufacture_id = SST_ID,
+ .model_id = SST_SST26VF032B,
+ .total_size = 4096,
+ .page_size = 256,
+ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP,
+ .tested = TEST_UNTESTED,
+ .probe = probe_spi_rdid,
+ .probe_timing = TIMING_ZERO,
+ .block_erasers =
+ {
+ {
+ .eraseblocks = { {4 * 1024, 1024} },
+ .block_erase = spi_block_erase_20,
+ }, {
+ .eraseblocks = {
+ {8 * 1024, 4},
+ {32 * 1024, 1},
+ {64 * 1024, 62},
+ {32 * 1024, 1},
+ {8 * 1024, 4},
+ },
+ .block_erase = spi_block_erase_d8,
+ }, {
+ .eraseblocks = { {4 * 1024 * 1024, 1} },
+ .block_erase = spi_block_erase_c7,
+ },
+ },
+ .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */
+ .unlock = spi_disable_blockprotect_sst26_global_unprotect,
+ .write = spi_chip_write_256, /* Multi I/O supported */
+ .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */
+ .voltage = {2700, 3600},
+ },
+
+
+ {
+ .vendor = "SST",
+ .name = "SST26VF064B(A)",
+ .bustype = BUS_SPI,
+ .manufacture_id = SST_ID,
+ .model_id = SST_SST26VF064B,
+ .total_size = 8192,
+ .page_size = 256,
+ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP,
+ .tested = TEST_OK_PREW,
+ .probe = probe_spi_rdid,
+ .probe_timing = TIMING_ZERO,
+ .block_erasers =
+ {
+ {
+ .eraseblocks = { {4 * 1024, 2048} },
+ .block_erase = spi_block_erase_20,
+ }, {
+ .eraseblocks = {
+ {8 * 1024, 4},
+ {32 * 1024, 1},
+ {64 * 1024, 126},
+ {32 * 1024, 1},
+ {8 * 1024, 4},
+ },
+ .block_erase = spi_block_erase_d8,
+ }, {
+ .eraseblocks = { {8 * 1024 * 1024, 1} },
+ .block_erase = spi_block_erase_c7,
+ },
+ },
+ .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */
+ .unlock = spi_disable_blockprotect_sst26_global_unprotect,
+ .write = spi_chip_write_256, /* Multi I/O supported */
+ .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */
+ .voltage = {2700, 3600},
+ },
+
+ {
+ .vendor = "SST",
.name = "SST25WF512",
.bustype = BUS_SPI,
.manufacture_id = SST_ID,
diff --git a/flashchips.h b/flashchips.h
index 68a67fa..36d7af6 100644
--- a/flashchips.h
+++ b/flashchips.h
@@ -703,6 +703,8 @@
#define SST_SST25VF064C 0x254B
#define SST_SST26VF016 0x2601
#define SST_SST26VF032 0x2602
+#define SST_SST26VF016B 0x2641
+#define SST_SST26VF032B 0x2642
#define SST_SST26VF064B 0x2643
#define SST_SST27SF512 0xA4
#define SST_SST27SF010 0xA5
diff --git a/spi25_statusreg.c b/spi25_statusreg.c
index 05c7acf..d4f0b5d 100644
--- a/spi25_statusreg.c
+++ b/spi25_statusreg.c
@@ -199,6 +199,19 @@
return spi_disable_blockprotect_generic(flash, 0x3C, 0, 0, 0xFF);
}
+int spi_disable_blockprotect_sst26_global_unprotect(struct flashctx *flash)
+{
+ int result = spi_write_enable(flash);
+ if (result)
+ return result;
+
+ static const unsigned char cmd[] = { 0x98 }; /* ULBPR */
+ result = spi_send_command(flash, sizeof(cmd), 0, cmd, NULL);
+ if (result)
+ msg_cerr("ULBPR failed\n");
+ return result;
+}
+
/* A common block protection disable that tries to unset the status register bits masked by 0x0C (BP0-1) and
* protected/locked by bit #7. Useful when bits 4-5 may be non-0). */
int spi_disable_blockprotect_bp1_srwd(struct flashctx *flash)
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