Edward O'Callaghan submitted this change.

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chipset_enable.c: Add Intel pch7 did=0x1e4{1,2,3} support

Modified to be pch7 over pch6 as per-coreboot and review
comments.

BUG=none
BRANCH=none
TEST=none

Change-Id: Ic69dc024e9af0c43d6b3a8213a5dc5d2f898c447
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/47090
Reviewed-by: Sam McNally <sammc@google.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
M chipset_enable.c
1 file changed, 3 insertions(+), 0 deletions(-)

diff --git a/chipset_enable.c b/chipset_enable.c
index 4273478..04ff9d8 100644
--- a/chipset_enable.c
+++ b/chipset_enable.c
@@ -1838,6 +1838,9 @@
 	{0x8086, 0x1c5c, B_FS,   DEP, "Intel", "H61",				enable_flash_pch6},
 	{0x8086, 0x1d40, B_FS,   DEP, "Intel", "C60x/X79",			enable_flash_pch6},
 	{0x8086, 0x1d41, B_FS,   DEP, "Intel", "C60x/X79",			enable_flash_pch6},
+	{0x8086, 0x1e41, B_FS,   DEP, "Intel", "Desktop Sample",		enable_flash_pch7},
+	{0x8086, 0x1e42, B_FS,   DEP, "Intel", "Mobile Sample",			enable_flash_pch7},
+	{0x8086, 0x1e43, B_FS,   DEP, "Intel", "SFF Sample",			enable_flash_pch7},
 	{0x8086, 0x1e44, B_FS,   DEP, "Intel", "Z77",				enable_flash_pch7},
 	{0x8086, 0x1e46, B_FS,   NT,  "Intel", "Z75",				enable_flash_pch7},
 	{0x8086, 0x1e47, B_FS,   DEP, "Intel", "Q77",				enable_flash_pch7},

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