Anastasia Klimchuk submitted this change.
flashchips: Add support for GigaDevice GD25LR256E, GD251R512ME
BUG=none
BRANCH=none
TEST= Flash image using Flashrom Tool
flashrom -p raiden_debug_spi -w <test_binary>
flashrom -p dediprog -w <test_binary>
Also tested by two people on the mailing list:
https://mail.coreboot.org/hyperkitty/list/flashrom@flashrom.org/thread/TCT534OIVOFZ2HHIJ4LSADQPS27ENCG2/
Change-Id: I2fe6bc1219cd1ee19b93caabab69de938cfc44b0
Signed-off-by: Ravi Sarawadi <ravishankar.sarawadi@intel.com>
Signed-off-by: Martin Roth <gaumless@gmail.com>
Signed-off-by: Anastasia Klimchuk <aklm@flashrom.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/58025
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Peter Marheine <pmarheine@chromium.org>
---
M flashchips.c
M include/flashchips.h
2 files changed, 112 insertions(+), 0 deletions(-)
diff --git a/flashchips.c b/flashchips.c
index b4f957b..776b3a8 100644
--- a/flashchips.c
+++ b/flashchips.c
@@ -6898,6 +6898,116 @@
},
{
+ .vendor = "GigaDevice",
+ .name = "GD25LR256E",
+ .bustype = BUS_SPI,
+ .manufacture_id = GIGADEVICE_ID,
+ .model_id = GIGADEVICE_GD25LR256E,
+ .total_size = 32768,
+ .page_size = 256,
+ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_QPI | FEATURE_4BA,
+ .tested = TEST_OK_PREW,
+ .probe = PROBE_SPI_RDID,
+ .probe_timing = TIMING_ZERO,
+ .block_erasers =
+ {
+ {
+ .eraseblocks = { {4 * 1024, 8192} },
+ .block_erase = SPI_BLOCK_ERASE_21,
+ }, {
+ .eraseblocks = { {4 * 1024, 8192} },
+ .block_erase = SPI_BLOCK_ERASE_20,
+ }, {
+ .eraseblocks = { {32 * 1024, 1024} },
+ .block_erase = SPI_BLOCK_ERASE_5C,
+ }, {
+ .eraseblocks = { {32 * 1024, 1024} },
+ .block_erase = SPI_BLOCK_ERASE_52,
+ }, {
+ .eraseblocks = { {64 * 1024, 512} },
+ .block_erase = SPI_BLOCK_ERASE_DC,
+ }, {
+ .eraseblocks = { {64 * 1024, 512} },
+ .block_erase = SPI_BLOCK_ERASE_D8,
+ }, {
+ .eraseblocks = { {32 * 1024 * 1024, 1} },
+ .block_erase = SPI_BLOCK_ERASE_60,
+ }, {
+ .eraseblocks = { {32 * 1024 * 1024, 1} },
+ .block_erase = SPI_BLOCK_ERASE_C7,
+ }
+ },
+ .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_BP4_SRWD,
+ .unlock = SPI_DISABLE_BLOCKPROTECT_BP4_SRWD,
+ .write = SPI_CHIP_WRITE256,
+ .read = SPI_CHIP_READ,
+ .voltage = {1650, 2000},
+ .reg_bits =
+ {
+ .srp = {STATUS1, 7, RW},
+ .bp = {{STATUS1, 2, RW}, {STATUS1, 3, RW}, {STATUS1, 4, RW}, {STATUS1, 5, RW}},
+ .tb = {STATUS1, 6, RW}, /* Called BP4 in datasheet, acts like TB */
+ },
+ .decode_range = DECODE_RANGE_SPI25,
+
+ },
+
+ {
+ .vendor = "GigaDevice",
+ .name = "GD25LR512ME",
+ .bustype = BUS_SPI,
+ .manufacture_id = GIGADEVICE_ID,
+ .model_id = GIGADEVICE_GD25LR512ME,
+ .total_size = 65536,
+ .page_size = 256,
+ /* OTP: 4096B total; read 0x48; write 0x42, erase 0x44 */
+ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_QPI | FEATURE_4BA,
+ .tested = TEST_OK_PREW,
+ .probe = PROBE_SPI_RDID,
+ .probe_timing = TIMING_ZERO,
+ .block_erasers =
+ {
+ {
+ .eraseblocks = { {4 * 1024, 16384} },
+ .block_erase = SPI_BLOCK_ERASE_21,
+ }, {
+ .eraseblocks = { {4 * 1024, 16384} },
+ .block_erase = SPI_BLOCK_ERASE_20,
+ }, {
+ .eraseblocks = { {32 * 1024, 2048} },
+ .block_erase = SPI_BLOCK_ERASE_5C,
+ }, {
+ .eraseblocks = { {32 * 1024, 2048} },
+ .block_erase = SPI_BLOCK_ERASE_52,
+ }, {
+ .eraseblocks = { {64 * 1024, 1024} },
+ .block_erase = SPI_BLOCK_ERASE_DC,
+ }, {
+ .eraseblocks = { {64 * 1024, 1024} },
+ .block_erase = SPI_BLOCK_ERASE_D8,
+ }, {
+ .eraseblocks = { {64 * 1024 * 1024, 1} },
+ .block_erase = SPI_BLOCK_ERASE_60,
+ }, {
+ .eraseblocks = { {64 * 1024 * 1024, 1} },
+ .block_erase = SPI_BLOCK_ERASE_C7,
+ }
+ },
+ .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_BP4_SRWD,
+ .unlock = SPI_DISABLE_BLOCKPROTECT_BP4_SRWD,
+ .write = SPI_CHIP_WRITE256,
+ .read = SPI_CHIP_READ,
+ .voltage = {1650, 2000},
+ .reg_bits =
+ {
+ .srp = {STATUS1, 7, RW},
+ .bp = {{STATUS1, 2, RW}, {STATUS1, 3, RW}, {STATUS1, 4, RW}, {STATUS1, 5, RW}},
+ .tb = {STATUS1, 6, RW}, /* Called BP4 in datasheet, acts like TB */
+ },
+ .decode_range = DECODE_RANGE_SPI25,
+ },
+
+ {
.vendor = "GigaDevice",
.name = "GD25Q10",
.bustype = BUS_SPI,
diff --git a/include/flashchips.h b/include/flashchips.h
index 2ec5aaf..b8a58b2 100644
--- a/include/flashchips.h
+++ b/include/flashchips.h
@@ -405,6 +405,8 @@
#define GIGADEVICE_GD25LQ128CD 0x6018
#define GIGADEVICE_GD25LQ255E 0x6019
#define GIGADEVICE_GD25LF128E 0x6318
+#define GIGADEVICE_GD25LR256E 0x6719
+#define GIGADEVICE_GD25LR512ME 0x671A
#define GIGADEVICE_GD25WQ80E 0x6514
#define GIGADEVICE_GD29GL064CAB 0x7E0601
To view, visit change 58025. To unsubscribe, or for help writing mail filters, visit settings.