Lubomir Rintel uploaded patch set #2 to this change.

View Change

vt_vx: check whether the chipset's MMIO range is configured

Avoid attempting to read the SPI bases from the location 0x00000000, all
zeroes mean that the chipset's MMIO area is not enabled.

Change-Id: I5d3a1ba695153e854e0979ae634f8ed97e6b6293
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
---
M chipset_enable.c
1 file changed, 8 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/flashrom refs/changes/63/22263/2

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Gerrit-Project: flashrom
Gerrit-Branch: staging
Gerrit-MessageType: newpatchset
Gerrit-Change-Id: I5d3a1ba695153e854e0979ae634f8ed97e6b6293
Gerrit-Change-Number: 22263
Gerrit-PatchSet: 2
Gerrit-Owner: Lubomir Rintel <lkundrak@v3.sk>
Gerrit-Reviewer: David Hendricks <david.hendricks@gmail.com>
Gerrit-Reviewer: Paul Menzel <paulepanter@users.sourceforge.net>
Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org>