David Hendricks has uploaded a new change for review. ( https://review.coreboot.org/19857 )
Change subject: spi: add opcodes for fast read and 4BA direct read ......................................................................
spi: add opcodes for fast read and 4BA direct read
Change-Id: Ic6dfab2dc48379b9b9c0d0a7551f9d294ce0a23a Signed-off-by: David Hendricks dhendricks@fb.com --- M spi.h M spi4ba.h 2 files changed, 11 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/57/19857/1
diff --git a/spi.h b/spi.h index de5b3be..c4b0bc2 100644 --- a/spi.h +++ b/spi.h @@ -141,6 +141,11 @@ #define JEDEC_READ_OUTSIZE 0x04 /* JEDEC_READ_INSIZE : any length */
+/* Read the memory (fast mode) */ +#define JEDEC_FAST_READ 0x0b +#define JEDEC_FAST_READ_OUTSIZE 0x04 +/* JEDEC_FAST_READ_INSIZE : any length */ + /* Write memory byte */ #define JEDEC_BYTE_PROGRAM 0x02 #define JEDEC_BYTE_PROGRAM_OUTSIZE 0x05 diff --git a/spi4ba.h b/spi4ba.h index 8e500d1..5784718 100644 --- a/spi4ba.h +++ b/spi4ba.h @@ -52,6 +52,12 @@ #define JEDEC_READ_4BA_OUTSIZE 0x05 /* JEDEC_READ_4BA_INSIZE : any length */
+/* Read the memory with 4-byte address only + Warning: This conflicts with "Burst Read with Wrap" on some chips */ +#define JEDEC_READ_4BA_DIRECT 0x0c +#define JEDEC_READ_4BA_DIRECT_OUTSIZE 0x05 +/* JEDEC_READ_4BA_DIRECT_INSIZE : any length */ + /* Write memory byte with 4-byte address From ANY mode (3-bytes or 4-bytes) it works with 4-byte address */ #define JEDEC_BYTE_PROGRAM_4BA 0x12