Angel Pons has uploaded this change for review.

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chipset_enable.c: Mark Broadwell U Premium as DEP

As per Laurent Grimaud on the mailing list. I also have said chipset.
Since all ME-enable chipsets are marked as DEP instead of OK, this
one shall follow suit as well.

Change-Id: Ie195e8ec9ea1a2393e31bebdaede4fd3c3301a17
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
---
M chipset_enable.c
1 file changed, 1 insertion(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/flashrom refs/changes/17/28817/1

diff --git a/chipset_enable.c b/chipset_enable.c
index 566b1fb..4b28924 100644
--- a/chipset_enable.c
+++ b/chipset_enable.c
@@ -1896,7 +1896,7 @@
 	{0x8086, 0x9c47, NT,  "Intel", "Lynx Point LP Value",		enable_flash_pch8_lp},
 	{0x8086, 0x9cc1, NT,  "Intel", "Haswell U Sample",		enable_flash_pch9_lp},
 	{0x8086, 0x9cc2, NT,  "Intel", "Broadwell U Sample",		enable_flash_pch9_lp},
-	{0x8086, 0x9cc3, NT,  "Intel", "Broadwell U Premium",		enable_flash_pch9_lp},
+	{0x8086, 0x9cc3, DEP, "Intel", "Broadwell U Premium",		enable_flash_pch9_lp},
 	{0x8086, 0x9cc5, NT,  "Intel", "Broadwell U Base",		enable_flash_pch9_lp},
 	{0x8086, 0x9cc6, NT,  "Intel", "Broadwell Y Sample",		enable_flash_pch9_lp},
 	{0x8086, 0x9cc7, NT,  "Intel", "Broadwell Y Premium",		enable_flash_pch9_lp},

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