Tim Wawrzynczak has uploaded this change for review.
flashrom: Return early from map_flash for >16MiB on x86
In the case of a flash chip bigger than 16 MiB, x86 chipsets are only
able to map the topmost 16 MiB of the chip into memory. To access the
rest, flashrom can use hardware sequencing, therefore return early
from `map_flash()` in this situation; this avoids messages like the
following in Linux kernel logs:
[ 57.715654] x86/PAT: flashrom:2805 conflicting memory types fe0000...
[ 57.726270] x86/PAT: memtype_reserve failed [mem 0xfe000000-0xffff...
BUG=b:185021901
TEST=On a system with a W25Q256.V (32MB), flashrom logs show:
$ flashrom -p host -r bios.bin
...
Found Winbond flash chip "W25Q256.V" (32768 kB, Programmer-specific) ...
Chipset unable to map >16 MiB of flash below 0xffffffff, falling back...
Reading flash... done.
SUCCESS
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Change-Id: I60244b6970118dbdfdbb5b8424fc0a8acd9def2e
---
M flashrom.c
1 file changed, 11 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/21/56721/1
diff --git a/flashrom.c b/flashrom.c
index 3987bb9..dea96b7 100644
--- a/flashrom.c
+++ b/flashrom.c
@@ -697,6 +697,17 @@
return 0;
const chipsize_t size = flash->chip->total_size * 1024;
+
+#if IS_X86
+ /* No known x86 chipset maps more than 16 MiB of the flash into memory
+ * below 0xfffffff, therefore return early here. */
+ if (size > 16 * MiB) {
+ msg_cinfo("Chipset unable to map >16 MiB of flash below 0xffffffff,"
+ "falling back to hardware sequencing.\n");
+ return 1;
+ }
+#endif
+
uintptr_t base = flashbase ? flashbase : (0xffffffff - size + 1);
void *addr = programmer_map_flash_region(flash->chip->name, base, size);
if (addr == ERROR_PTR) {
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