Jacob Creedon has uploaded this change for review.
flashchips: Add missing MT25Q capacities
This adds the 128Mb, 1Gb, and 2Gb capacities of the MT25Q devices. All
of these are implemented via the datasheet and should work but are
untested in hardware.
Signed-off-by: Jacob Creedon <jcreedon@google.com>
Change-Id: Ice6ea9426361afc25d4b731e2e3079edf234fdda
---
M flashchips.c
M flashchips.h
2 files changed, 274 insertions(+), 7 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/92/34492/1
diff --git a/flashchips.c b/flashchips.c
index 5424a04..6b553fb 100644
--- a/flashchips.c
+++ b/flashchips.c
@@ -10705,6 +10705,270 @@
{
.vendor = "Micron",
+ .name = "MT25QL01G", /* L = 3V, uniform 64KB/4KB blocks/sectors */
+ .bustype = BUS_SPI,
+ .manufacture_id = ST_ID,
+ .model_id = ST_N25Q00A__3E,
+ .total_size = 131072,
+ .page_size = 256,
+ /* supports SFDP */
+ /* OTP: 64B total; read 0x4B, write 0x42 */
+ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_WREN,
+ .tested = TEST_UNTESTED,
+ .probe = probe_spi_rdid,
+ .probe_timing = TIMING_ZERO,
+ .block_erasers =
+ {
+ {
+ .eraseblocks = { {4 * 1024, 32768} },
+ .block_erase = spi_block_erase_21,
+ }, {
+ .eraseblocks = { {4 * 1024, 32768} },
+ .block_erase = spi_block_erase_20,
+ }, {
+ .eraseblocks = { {32 * 1024, 4096} },
+ .block_erase = spi_block_erase_5c,
+ }, {
+ .eraseblocks = { {32 * 1024, 4096} },
+ .block_erase = spi_block_erase_52,
+ }, {
+ .eraseblocks = { {64 * 1024, 2048} },
+ .block_erase = spi_block_erase_dc,
+ }, {
+ .eraseblocks = { {64 * 1024, 2048} },
+ .block_erase = spi_block_erase_d8,
+ }, {
+ .eraseblocks = { {131072 * 1024, 1} },
+ .block_erase = spi_block_erase_c4,
+ }
+ },
+ .printlock = spi_prettyprint_status_register_n25q, /* TODO: config, lock, flag regs */
+ .unlock = spi_disable_blockprotect_n25q, /* TODO: per 64kB sector lock registers */
+ .write = spi_chip_write_256, /* Multi I/O supported */
+ .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */
+ .voltage = {2700, 3600},
+ },
+
+ {
+ .vendor = "Micron",
+ .name = "MT25QU01G", /* U = 1.8V, uniform 64KB/4KB blocks/sectors */
+ .bustype = BUS_SPI,
+ .manufacture_id = ST_ID,
+ .model_id = ST_N25Q00A__1E,
+ .total_size = 131072,
+ .page_size = 256,
+ /* supports SFDP */
+ /* OTP: 64B total; read 0x4B, write 0x42 */
+ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_WREN,
+ .tested = TEST_UNTESTED,
+ .probe = probe_spi_rdid,
+ .probe_timing = TIMING_ZERO,
+ .block_erasers =
+ {
+ {
+ .eraseblocks = { {4 * 1024, 32768} },
+ .block_erase = spi_block_erase_21,
+ }, {
+ .eraseblocks = { {4 * 1024, 32768} },
+ .block_erase = spi_block_erase_20,
+ }, {
+ .eraseblocks = { {32 * 1024, 4096} },
+ .block_erase = spi_block_erase_5c,
+ }, {
+ .eraseblocks = { {32 * 1024, 4096} },
+ .block_erase = spi_block_erase_52,
+ }, {
+ .eraseblocks = { {64 * 1024, 2048} },
+ .block_erase = spi_block_erase_dc,
+ }, {
+ .eraseblocks = { {64 * 1024, 2048} },
+ .block_erase = spi_block_erase_d8,
+ }, {
+ .eraseblocks = { {131072 * 1024, 1} },
+ .block_erase = spi_block_erase_c4,
+ }
+ },
+ .printlock = spi_prettyprint_status_register_n25q, /* TODO: config, lock, flag regs */
+ .unlock = spi_disable_blockprotect_n25q, /* TODO: per 64kB sector lock registers */
+ .write = spi_chip_write_256, /* Multi I/O supported */
+ .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */
+ .voltage = {1700, 2000},
+ },
+
+ {
+ .vendor = "Micron",
+ .name = "MT25QL02G", /* L = 3V, uniform 64KB/4KB blocks/sectors */
+ .bustype = BUS_SPI,
+ .manufacture_id = ST_ID,
+ .model_id = ST_MT25QL02G,
+ .total_size = 262144,
+ .page_size = 256,
+ /* supports SFDP */
+ /* OTP: 64B total; read 0x4B, write 0x42 */
+ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_WREN,
+ .tested = TEST_UNTESTED,
+ .probe = probe_spi_rdid,
+ .probe_timing = TIMING_ZERO,
+ .block_erasers =
+ {
+ {
+ .eraseblocks = { {4 * 1024, 65536} },
+ .block_erase = spi_block_erase_21,
+ }, {
+ .eraseblocks = { {4 * 1024, 65536} },
+ .block_erase = spi_block_erase_20,
+ }, {
+ .eraseblocks = { {32 * 1024, 8192} },
+ .block_erase = spi_block_erase_5c,
+ }, {
+ .eraseblocks = { {32 * 1024, 8192} },
+ .block_erase = spi_block_erase_52,
+ }, {
+ .eraseblocks = { {64 * 1024, 4096} },
+ .block_erase = spi_block_erase_dc,
+ }, {
+ .eraseblocks = { {64 * 1024, 4096} },
+ .block_erase = spi_block_erase_d8,
+ }, {
+ .eraseblocks = { {262144 * 1024, 1} },
+ .block_erase = spi_block_erase_c4,
+ }
+ },
+ .printlock = spi_prettyprint_status_register_n25q, /* TODO: config, lock, flag regs */
+ .unlock = spi_disable_blockprotect_n25q, /* TODO: per 64kB sector lock registers */
+ .write = spi_chip_write_256, /* Multi I/O supported */
+ .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */
+ .voltage = {2700, 3600},
+ },
+
+ {
+ .vendor = "Micron",
+ .name = "ST_MT25QU02G", /* U = 1.8V, uniform 64KB/4KB blocks/sectors */
+ .bustype = BUS_SPI,
+ .manufacture_id = ST_ID,
+ .model_id = ST_N25Q00A__1E,
+ .total_size = 262144,
+ .page_size = 256,
+ /* supports SFDP */
+ /* OTP: 64B total; read 0x4B, write 0x42 */
+ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_WREN,
+ .tested = TEST_UNTESTED,
+ .probe = probe_spi_rdid,
+ .probe_timing = TIMING_ZERO,
+ .block_erasers =
+ {
+ {
+ .eraseblocks = { {4 * 1024, 65536} },
+ .block_erase = spi_block_erase_21,
+ }, {
+ .eraseblocks = { {4 * 1024, 65536} },
+ .block_erase = spi_block_erase_20,
+ }, {
+ .eraseblocks = { {32 * 1024, 8192} },
+ .block_erase = spi_block_erase_5c,
+ }, {
+ .eraseblocks = { {32 * 1024, 8192} },
+ .block_erase = spi_block_erase_52,
+ }, {
+ .eraseblocks = { {64 * 1024, 4096} },
+ .block_erase = spi_block_erase_dc,
+ }, {
+ .eraseblocks = { {64 * 1024, 4096} },
+ .block_erase = spi_block_erase_d8,
+ }, {
+ .eraseblocks = { {262144 * 1024, 1} },
+ .block_erase = spi_block_erase_c4,
+ }
+ },
+ .printlock = spi_prettyprint_status_register_n25q, /* TODO: config, lock, flag regs */
+ .unlock = spi_disable_blockprotect_n25q, /* TODO: per 64kB sector lock registers */
+ .write = spi_chip_write_256, /* Multi I/O supported */
+ .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */
+ .voltage = {1700, 2000},
+ },
+
+ {
+ .vendor = "Micron",
+ .name = "MT25QU128", /* U = 1.8V, uniform 64KB/4KB blocks/sectors */
+ .bustype = BUS_SPI,
+ .manufacture_id = ST_ID,
+ .model_id = ST_N25Q128__1E,
+ .total_size = 16384,
+ .page_size = 256,
+ /* supports SFDP */
+ /* OTP: 64B total; read 0x4B, write 0x42 */
+ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_WREN,
+ .tested = TEST_UNTESTED,
+ .probe = probe_spi_rdid,
+ .probe_timing = TIMING_ZERO,
+ .block_erasers =
+ {
+ {
+ .eraseblocks = { {4 * 1024, 4096} },
+ .block_erase = spi_block_erase_20,
+ }, {
+ .eraseblocks = { {32 * 1024, 512} },
+ .block_erase = spi_block_erase_52,
+ }, {
+ .eraseblocks = { {64 * 1024, 256} },
+ .block_erase = spi_block_erase_d8,
+ }, {
+ .eraseblocks = { {16384 * 1024, 1} },
+ .block_erase = spi_block_erase_c7,
+ }, {
+ .eraseblocks = { {16384 * 1024, 1} },
+ .block_erase = spi_block_erase_60,
+ }
+ },
+ .printlock = spi_prettyprint_status_register_n25q, /* TODO: config, lock, flag regs */
+ .unlock = spi_disable_blockprotect_n25q, /* TODO: per 64kB sector lock registers */
+ .write = spi_chip_write_256, /* Multi I/O supported */
+ .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */
+ .voltage = {1700, 2000},
+ },
+
+ {
+ .vendor = "Micron",
+ .name = "MT25QL128", /* L = 3V, uniform 64KB/4KB blocks/sectors */
+ .bustype = BUS_SPI,
+ .manufacture_id = ST_ID,
+ .model_id = ST_N25Q128__3E,
+ .total_size = 16384,
+ .page_size = 256,
+ /* supports SFDP */
+ /* OTP: 64B total; read 0x4B, write 0x42 */
+ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_WREN,
+ .tested = TEST_UNTESTED,
+ .probe = probe_spi_rdid,
+ .probe_timing = TIMING_ZERO,
+ .block_erasers =
+ {
+ {
+ .eraseblocks = { {4 * 1024, 4096} },
+ .block_erase = spi_block_erase_20,
+ }, {
+ .eraseblocks = { {32 * 1024, 512} },
+ .block_erase = spi_block_erase_52,
+ }, {
+ .eraseblocks = { {64 * 1024, 256} },
+ .block_erase = spi_block_erase_d8,
+ }, {
+ .eraseblocks = { {16384 * 1024, 1} },
+ .block_erase = spi_block_erase_c7,
+ }, {
+ .eraseblocks = { {16384 * 1024, 1} },
+ .block_erase = spi_block_erase_60,
+ }
+ },
+ .printlock = spi_prettyprint_status_register_n25q, /* TODO: config, lock, flag regs */
+ .unlock = spi_disable_blockprotect_n25q, /* TODO: per 64kB sector lock registers */
+ .write = spi_chip_write_256, /* Multi I/O supported */
+ .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */
+ .voltage = {2700, 3600},
+ },
+
+ {
+ .vendor = "Micron",
.name = "MT25QL256", /* L = 3V, uniform 64KB/4KB blocks/sectors */
.bustype = BUS_SPI,
.manufacture_id = ST_ID,
diff --git a/flashchips.h b/flashchips.h
index 006b95e..e53e0df 100644
--- a/flashchips.h
+++ b/flashchips.h
@@ -862,13 +862,16 @@
#define ST_N25Q032__1E 0xBB16 /* N25Q032, 1.8V, (uniform sectors expected) */
#define ST_N25Q064__3E 0xBA17 /* N25Q064, 3.0V, (uniform sectors expected) */
#define ST_N25Q064__1E 0xBB17 /* N25Q064, 1.8V, (uniform sectors expected) */
-#define ST_N25Q128__3E 0xBA18 /* N25Q128, 3.0V, (uniform sectors expected) */
-#define ST_N25Q128__1E 0xBB18 /* N25Q128, 1.8V, (uniform sectors expected) */
-#define ST_N25Q256__3E 0xBA19 /* N25Q256, 3.0V, (uniform sectors expected) */
-#define ST_N25Q256__1E 0xBB19 /* N25Q256, 1.8V, (uniform sectors expected) */
-#define ST_N25Q512__3E 0xBA20 /* N25Q512, 3.0V, (uniform sectors expected) */
-#define ST_N25Q512__1E 0xBB20 /* N25Q512, 1.8V, (uniform sectors expected) */
-#define ST_N25Q00A__3E 0xBA21 /* N25Q00A, 3.0V, (uniform sectors expected) */
+#define ST_N25Q128__3E 0xBA18 /* N25Q128/MT25QL128, 3.0V, (uniform sectors expected) */
+#define ST_N25Q128__1E 0xBB18 /* N25Q128/MT25QU128, 1.8V, (uniform sectors expected) */
+#define ST_N25Q256__3E 0xBA19 /* N25Q256/MT25QL256, 3.0V, (uniform sectors expected) */
+#define ST_N25Q256__1E 0xBB19 /* N25Q256/MT25QU256, 1.8V, (uniform sectors expected) */
+#define ST_N25Q512__3E 0xBA20 /* N25Q512/MT25QL512, 3.0V, (uniform sectors expected) */
+#define ST_N25Q512__1E 0xBB20 /* N25Q512/MT25QU512, 1.8V, (uniform sectors expected) */
+#define ST_N25Q00A__3E 0xBA21 /* N25Q00A/MT25QL01G, 3.0V, (uniform sectors expected) */
+#define ST_N25Q00A__1E 0xBB21 /* N25Q00A/MT25QU01G, 1.8V, (uniform sectors expected) */
+#define ST_MT25QL02G 0xBA22 /* MT25QL02G, 3.0V, (uniform sectors expected) */
+#define ST_MT25QU02G 0xBB22 /* MT25QU02G, 1.8V, (uniform sectors expected) */
#define ST_NP5Q032 0xDA16 /* Phase-change memory (PCM), 3V */
#define ST_NP5Q064 0xDA17 /* Phase-change memory (PCM), 3V */
#define ST_NP5Q128 0xDA18 /* Phase-change memory (PCM), 3V */
To view, visit change 34492. To unsubscribe, or for help writing mail filters, visit settings.