Edward O'Callaghan has uploaded this change for review.

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chipset_enable.c: Enable Tiger Lake U support

Did a basic local test with --flash-name and -r bios and
ran strings to see if the bios contained reasonable data.

BUG=b:146089922

Change-Id: I2c13e0173c9b5e17d2ae197f4a4ab9aa2825c1b3
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
---
M chipset_enable.c
1 file changed, 1 insertion(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/flashrom refs/changes/77/37777/1

diff --git a/chipset_enable.c b/chipset_enable.c
index b55852c..d5a2f03 100644
--- a/chipset_enable.c
+++ b/chipset_enable.c
@@ -1996,6 +1996,7 @@
 	{0x8086, 0x9d56, B_S,    NT,  "Intel", "Kaby Lake Y Premium",		enable_flash_pch100},
 	{0x8086, 0x9d58, B_S,    NT,  "Intel", "Kaby Lake U Premium",		enable_flash_pch100},
 	{0x8086, 0x9d84, B_S,    DEP, "Intel", "Cannon Lake U Premium",		enable_flash_pch300},
+	{0x8086, 0xa082, B_FS,   NT,  "Intel", "Tiger Lake U",			enable_flash_pch300},
 	{0x8086, 0xa141, B_S,    NT,  "Intel", "Sunrise Point Desktop Sample",	enable_flash_pch100},
 	{0x8086, 0xa142, B_S,    NT,  "Intel", "Sunrise Point Unknown Sample",	enable_flash_pch100},
 	{0x8086, 0xa143, B_S,    NT,  "Intel", "H110",				enable_flash_pch100},

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