Attention is currently required from: Subrata Banik, Caveh Jalali, Rizwan Qureshi, Tim Wawrzynczak, Sridhar Siricilla, Angel Pons, Nick Vaccaro, Alex Levin, YH Lin, Boris Mittelberg.
Patch set 3:Code-Review -1
1 comment:
Patchset:
This leaves some questions. Is something broken wrt. arbitration? How does
arbitration work if two masters set FGO at the same time? is that accounted
for in the hardware?Yes this is taken care in the HW. The SPI Ctrlr will queue the transaction of one of the masters until the other is served.
Thank you Rizwan. That's how I always understood it. However, Subrata's test
result suggest otherwise:My Bad Nico, I'm also saying the same. This SCIP bit is for each master like when u start a flashrom operation that sets the SCIP bit and attempt to run flashrom using other application (where currently flashrom doesn't bother to look at SCIP even on the same master), we are seeing `timeout` issue in transaction.
Note: there are other tool that uses the flashrom even on running from host (if we leave CSE for now) and if there is no sync mechanism in operations at host side, we will run into the issue.
As I said there is no way to synchronize this with the SCIP bit alone. Trying to
do so makes the code look rather ill-considered. Running two programs using these
registers at once has many more implications, e.g. one process could clear status
bits that another is waiting for. It seems mind-boggling to continue the program
when it detects that another one is accessing the registers.
Please describe your use-case including this other tool in detail and bring it
to the mailing list <flashrom@flashrom.org>. We can try to help finding a solution
to your problems but not if the problem description stays vague, changes at your
convenience and earlier test results that suggest that your hardware does something
wrong are ignored.
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