Attention is currently required from: DZ, Nikolai Artemiev, Stefan Reinauer.

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3 comments:

• File flashchips.c:

  • Patch Set #1, Line 9283: OTP: 64B total

    I know it was like this before, but datasheets for both chips say 4k-bit secured OTP, so seems like it was wrong before. It should be 512B

  • Patch Set #1, Line 9284: FEATURE_CFGR

    None of datasheets have configuration register?

  • Patch Set #1, Line 9313: .tb = {CONFIG, 3, OTP}

    Same as above, none of datasheets have configuration register

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