Felix Singer submitted this change.

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3 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the submitted one.

Approvals: build bot (Jenkins): Verified Felix Singer: Looks good to me, approved Angel Pons: Looks good to me, approved
flashrom.8.tmpl: Clarify supported ft2232_spi frequencies

The manpage suggests that ft2232_spi chips are only capable of up to
6 MHz SPI clock frequencies, whereas flashrom disables the divide-by-5
prescaler on the 'H' chips allowing up to 30 MHz frequencies. This
detail was already present in the comments of ft2232_spi.c.

Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
Change-Id: Id7690e1d4e11a3d0495afbc650f3c67430946468
Reviewed-on: https://review.coreboot.org/c/flashrom/+/70218
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
M flashrom.8.tmpl
1 file changed, 21 insertions(+), 2 deletions(-)

diff --git a/flashrom.8.tmpl b/flashrom.8.tmpl
index 4c43323..0eabee5 100644
--- a/flashrom.8.tmpl
+++ b/flashrom.8.tmpl
@@ -939,8 +939,8 @@
expressible divisors are all
.B even
numbers between 2 and 2^17 (=131072) resulting in SPI clock frequencies of
-6 MHz down to about 92 Hz for 12 MHz inputs. The default divisor is set to 2, but you can use another one by
-specifying the optional
+6 MHz down to about 92 Hz for 12 MHz inputs (non-H chips) and 30 MHz down to about 458 Hz for 60 MHz inputs ('H' chips). The default
+divisor is set to 2, but you can use another one by specifying the optional
.B divisor
parameter with the
.sp

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Gerrit-Project: flashrom
Gerrit-Branch: master
Gerrit-Change-Id: Id7690e1d4e11a3d0495afbc650f3c67430946468
Gerrit-Change-Number: 70218
Gerrit-PatchSet: 5
Gerrit-Owner: Nicholas Chin <nic.c3.14@gmail.com>
Gerrit-Reviewer: Angel Pons <th3fanbus@gmail.com>
Gerrit-Reviewer: Felix Singer <felixsinger@posteo.net>
Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org>
Gerrit-MessageType: merged