Attention is currently required from: DZ, Nikolai Artemiev, Stefan Reinauer.

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3 comments:

• File flashchips.c:

  • Patch Set #1, Line 11104: 512B

    Datasheet says `8K-bit secured OTP` so I think this is 1024B

  • Patch Set #1, Line 11111:

    {
    				.eraseblocks = { {4 * 1024, 8192} },
    				.block_erase = SPI_BLOCK_ERASE_21,
    			},
    

    I don't see it in datasheet (I mean: 21h, 5Ch, DCh)? I see there is:

    20h for 4K
    52h for 32K
    D8h for 64K
    60h or C7h for chip erase

    I am looking at sections 10-24 and to 10-27 which describe erase commands?

  • Patch Set #1, Line 11137: /* TODO: security register */

    You can remove TODO, you added security register bits below

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