Attention is currently required from: Subrata Banik, Nikolai Artemiev.

Nikolai Artemiev uploaded patch set #5 to this change.

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writeprotect,ichspi,spi25: handle register access constraints

Make the spi25 register read/write functions return SPI_INVALID_OPCODE
if the programmer blocks the read/write opcode for the register.

Likewise, make ichspi read/write register functions return
SPI_INVALID_OPCODE for registers >SR1 as they cannot be accessd.

Make writeprotect ignore SPI_INVALID_OPCODE unless it is trying to
read/write SR1, which should always be supported.

BUG=b:253715389,b:253713774
BRANCH=none
TEST=builds

Change-Id: I2145749dcc51f4556550650dab5aa1049f879c45
Signed-off-by: Nikolai Artemiev <nartemiev@google.com>
---
M ichspi.c
M spi25_statusreg.c
M writeprotect.c
3 files changed, 75 insertions(+), 8 deletions(-)

git pull ssh://review.coreboot.org:29418/flashrom refs/changes/29/69129/5

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Gerrit-Project: flashrom
Gerrit-Branch: master
Gerrit-Change-Id: I2145749dcc51f4556550650dab5aa1049f879c45
Gerrit-Change-Number: 69129
Gerrit-PatchSet: 5
Gerrit-Owner: Nikolai Artemiev <nartemiev@google.com>
Gerrit-Reviewer: Edward O'Callaghan <quasisec@chromium.org>
Gerrit-Reviewer: Subrata Banik <subratabanik@google.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org>
Gerrit-Attention: Subrata Banik <subratabanik@google.com>
Gerrit-Attention: Nikolai Artemiev <nartemiev@google.com>
Gerrit-MessageType: newpatchset