Edward O'Callaghan uploaded patch set #2 to this change.

View Change

chipset_enable.c: Add Geminilake support

Adds product id's for 0x31f0 for Geminilake. Apollolake is already
in the list.

Currently, on Apollolake platform, the SPI PCI device is hidden in
the OS. Thus, flashrom is not able to find the SPI device while
walking the PCI tree. Instead use the PCI ID of APL host bridge. In
the callback for enabling APL flash, use mmio-based access to mmap
SPI PCI device and work with it.

BUG=none
BRANCH=none
TEST=none

Change-Id: I533a426bbf8e9c5efef0cf693693086e8efc1f57
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
---
M chipset_enable.c
1 file changed, 1 insertion(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/flashrom refs/changes/91/47091/2

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Gerrit-Project: flashrom
Gerrit-Branch: master
Gerrit-Change-Id: I533a426bbf8e9c5efef0cf693693086e8efc1f57
Gerrit-Change-Number: 47091
Gerrit-PatchSet: 2
Gerrit-Owner: Edward O'Callaghan <quasisec@chromium.org>
Gerrit-Reviewer: Angel Pons <th3fanbus@gmail.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org>
Gerrit-CC: Paul Menzel <paulepanter@users.sourceforge.net>
Gerrit-MessageType: newpatchset