Edward O'Callaghan has uploaded this change for review.

View Change

spi25: Add 'spi_read_status_register_2()' helper

Winbond chips have a WRSR opcode of 0x35 interestingly.
Add helper to allow for reading it. This is later used
by writeprotection support.

BUG=b:153800563
BRANCH=none
TEST=builds

Change-Id: I2d25f22ced17ab94d122e86b270357723b45458e
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
---
M chipdrivers.h
M spi25_statusreg.c
2 files changed, 13 insertions(+), 2 deletions(-)

git pull ssh://review.coreboot.org:29418/flashrom refs/changes/48/45748/1

diff --git a/chipdrivers.h b/chipdrivers.h
index cf03811..4e76588 100644
--- a/chipdrivers.h
+++ b/chipdrivers.h
@@ -63,6 +63,7 @@
 
 /* spi25_statusreg.c */
 uint8_t spi_read_status_register(const struct flashctx *flash);
+uint8_t spi_read_status_register_2(const struct flashctx *flash);
 int spi_write_status_register(const struct flashctx *flash, int status);
 void spi_prettyprint_status_register_bit(uint8_t status, int bit);
 int spi_prettyprint_status_register_plain(struct flashctx *flash);
diff --git a/spi25_statusreg.c b/spi25_statusreg.c
index 34f9ad4..cad92e6 100644
--- a/spi25_statusreg.c
+++ b/spi25_statusreg.c
@@ -90,9 +90,9 @@
 	return ret;
 }
 
-uint8_t spi_read_status_register(const struct flashctx *flash)
+static uint8_t spi_read_status_register_generic(const struct flashctx *flash, uint8_t opcode)
 {
-	static const unsigned char cmd[JEDEC_RDSR_OUTSIZE] = { JEDEC_RDSR };
+	const unsigned char cmd[JEDEC_RDSR_OUTSIZE] = { opcode };
 	/* FIXME: No workarounds for driver/hardware bugs in generic code. */
 	unsigned char readarr[2]; /* JEDEC_RDSR_INSIZE=1 but wbsio needs 2 */
 	int ret;
@@ -108,6 +108,16 @@
 	return readarr[0];
 }
 
+uint8_t spi_read_status_register(const struct flashctx *flash)
+{
+	return spi_read_status_register_generic(flash, JEDEC_RDSR);
+}
+
+uint8_t spi_read_status_register_2(const struct flashctx *flash)
+{
+	return spi_read_status_register_generic(flash, 0x35); /* Unclear if this is a std JEDEC opcode. */
+}
+
 /* A generic block protection disable.
  * Tests if a protection is enabled with the block protection mask (bp_mask) and returns success otherwise.
  * Tests if the register bits are locked with the lock_mask (lock_mask).

To view, visit change 45748. To unsubscribe, or for help writing mail filters, visit settings.