Edward O'Callaghan has uploaded this change for review.
sb600spi.c: Generalise determin_generation() after Yangtze
Drop dead USE_YANGTZE_HEURISTICS code.
Change-Id: I5aa7370025f5c1af56c6cb96194b6f3007d0ede7
Signed-off-by: Edward O'Callaghan <quasisec@chromium.org>
---
M sb600spi.c
1 file changed, 4 insertions(+), 21 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/26/36426/1
diff --git a/sb600spi.c b/sb600spi.c
index 48baf15..482c2f6 100644
--- a/sb600spi.c
+++ b/sb600spi.c
@@ -118,22 +118,6 @@
} else if (dev->device_id == 0x780e) {
/* The PCI ID of the LPC bridge doesn't change between Hudson-2/3/4 and Yangtze (Kabini/Temash)
* although they use different SPI interfaces. */
-#ifdef USE_YANGTZE_HEURISTICS
- /* This heuristic accesses the SPI interface MMIO BAR at locations beyond those supported by
- * Hudson in the hope of getting 0xff readback on older chipsets and non-0xff readback on
- * Yangtze (and newer, compatible chipsets). */
- int i;
- msg_pdbg("Checking for AMD Yangtze (Kabini/Temash) or later... ");
- for (i = 0x20; i <= 0x4f; i++) {
- if (mmio_readb(sb600_spibar + i) != 0xff) {
- amd_gen = CHIPSET_YANGTZE;
- msg_pdbg("found.\n");
- return 0;
- }
- }
- msg_pdbg("not found. Assuming Hudson.\n");
- amd_gen = CHIPSET_HUDSON234;
-#else
int rev = find_smbus_dev(0x1022, 0x780B);
if (rev < 0)
return -1;
@@ -165,7 +149,6 @@
}
-#endif
} else
msg_pwarn("%s: Unknown LPC device %" PRIx16 ":%" PRIx16 ".\n"
"Please report this to flashrom@flashrom.org and include this log and\n"
@@ -595,7 +578,7 @@
msg_pdbg("SpiRomEnable=%i", (tmp >> 1) & 0x1);
if (amd_gen == CHIPSET_SB7XX)
msg_pdbg(", AltSpiCSEnable=%i, AbortEnable=%i", tmp & 0x1, (tmp >> 2) & 0x1);
- else if (amd_gen == CHIPSET_YANGTZE)
+ else if (amd_gen >= CHIPSET_YANGTZE)
msg_pdbg(", RouteTpm2Sp=%i", (tmp >> 3) & 0x1);
tmp = pci_read_byte(dev, 0xba);
@@ -631,13 +614,13 @@
*/
tmp = mmio_readl(sb600_spibar + 0x00);
msg_pdbg("(0x%08" PRIx32 ") SpiArbEnable=%i", tmp, (tmp >> 19) & 0x1);
- if (amd_gen == CHIPSET_YANGTZE)
+ if (amd_gen >= CHIPSET_YANGTZE)
msg_pdbg(", IllegalAccess=%i", (tmp >> 21) & 0x1);
msg_pdbg(", SpiAccessMacRomEn=%i, SpiHostAccessRomEn=%i, ArbWaitCount=%i",
(tmp >> 22) & 0x1, (tmp >> 23) & 0x1, (tmp >> 24) & 0x7);
- if (amd_gen != CHIPSET_YANGTZE)
+ if (amd_gen < CHIPSET_YANGTZE)
msg_pdbg(", SpiBridgeDisable=%i", (tmp >> 27) & 0x1);
switch (amd_gen) {
@@ -710,7 +693,7 @@
return ERROR_FATAL;
/* Starting with Yangtze the SPI controller got a different interface with a much bigger buffer. */
- if (amd_gen != CHIPSET_YANGTZE)
+ if (amd_gen < CHIPSET_YANGTZE)
register_spi_master(&spi_master_sb600);
else
register_spi_master(&spi_master_yangtze);
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