Edward O'Callaghan has uploaded this change for review.

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ichspi.c: Consolidate ich_spi_mode select into a switch stmt

Change-Id: I35535c3dac9fa796d204d60e5fc72a7d5f85d706
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
---
M ichspi.c
1 file changed, 12 insertions(+), 10 deletions(-)

git pull ssh://review.coreboot.org:29418/flashrom refs/changes/94/43894/1

diff --git a/ichspi.c b/ichspi.c
index 4dbe69a..1cc1cd7 100644
--- a/ichspi.c
+++ b/ichspi.c
@@ -2002,16 +2002,18 @@
 			ich_spi_mode = ich_hwseq;
 		}
 
-		if (ich_spi_mode == ich_auto &&
-		    (ich_gen == CHIPSET_100_SERIES_SUNRISE_POINT ||
-		     ich_gen == CHIPSET_300_SERIES_CANNON_POINT)) {
-			msg_pdbg("Enabling hardware sequencing by default for 100+ series PCH.\n");
-			ich_spi_mode = ich_hwseq;
-		}
-
-		if (ich_spi_mode == ich_auto && ich_gen == CHIPSET_APOLLO_LAKE) {
-			msg_pdbg("Enabling hardware sequencing by default for Apollo Lake.\n");
-			ich_spi_mode = ich_hwseq;
+		if (ich_spi_mode == ich_auto) {
+			switch (ich_gen) {
+			case CHIPSET_100_SERIES_SUNRISE_POINT:
+			case CHIPSET_300_SERIES_CANNON_POINT:
+			case CHIPSET_APOLLO_LAKE:
+				msg_pdbg("Enabling hardware sequencing by default "
+					 "for 100+ series PCH.\n");
+				ich_spi_mode = ich_hwseq;
+				break;
+			default:
+				break;
+			}
 		}
 
 		if (ich_spi_mode == ich_hwseq) {

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