Attention is currently required from: Arthur Heymans.
Edward O'Callaghan has uploaded this change for review.
internal/chipset_enable: Pass flashprog to drv init() entry
Change-Id: I07c968fd77960b7c1d1dddb1009fac68e6c45bf2
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
---
M chipset_enable.c
M ichspi.c
M include/programmer.h
M internal.c
M sb600spi.c
5 files changed, 135 insertions(+), 125 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/16/72816/1
diff --git a/chipset_enable.c b/chipset_enable.c
index 480113a..f7e0916 100644
--- a/chipset_enable.c
+++ b/chipset_enable.c
@@ -44,7 +44,7 @@
#include "hwaccess_x86_io.h"
#include "hwaccess_x86_msr.h"
-static int enable_flash_ali_m1533(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
+static int enable_flash_ali_m1533(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
{
uint8_t tmp;
@@ -59,7 +59,7 @@
return 0;
}
-static int enable_flash_rdc_r8610(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
+static int enable_flash_rdc_r8610(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
{
uint8_t tmp;
@@ -85,7 +85,7 @@
return 0;
}
-static int enable_flash_sis85c496(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
+static int enable_flash_sis85c496(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
{
uint8_t tmp;
@@ -96,7 +96,7 @@
return 0;
}
-static int enable_flash_sis_mapping(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
+static int enable_flash_sis_mapping(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
{
#define SIS_MAPREG 0x40
uint8_t new, newer;
@@ -135,7 +135,7 @@
return sbdev;
}
-static int enable_flash_sis501(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
+static int enable_flash_sis501(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
{
uint8_t tmp;
int ret = 0;
@@ -145,7 +145,7 @@
if (!sbdev)
return -1;
- ret = enable_flash_sis_mapping(cfg, sbdev, name);
+ ret = enable_flash_sis_mapping(flashprog, cfg, sbdev, name);
tmp = sio_read(0x22, 0x80);
tmp &= (~0x20);
@@ -160,7 +160,7 @@
return ret;
}
-static int enable_flash_sis5511(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
+static int enable_flash_sis5511(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
{
uint8_t tmp;
int ret = 0;
@@ -170,7 +170,7 @@
if (!sbdev)
return -1;
- ret = enable_flash_sis_mapping(cfg, sbdev, name);
+ ret = enable_flash_sis_mapping(flashprog, cfg, sbdev, name);
tmp = sio_read(0x22, 0x50);
tmp &= (~0x20);
@@ -180,7 +180,7 @@
return ret;
}
-static int enable_flash_sis5x0(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name, uint8_t dis_mask, uint8_t en_mask)
+static int enable_flash_sis5x0(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name, uint8_t dis_mask, uint8_t en_mask)
{
#define SIS_REG 0x45
uint8_t new, newer;
@@ -191,7 +191,7 @@
if (!sbdev)
return -1;
- ret = enable_flash_sis_mapping(cfg, sbdev, name);
+ ret = enable_flash_sis_mapping(flashprog, cfg, sbdev, name);
new = pci_read_byte(sbdev, SIS_REG);
new &= (~dis_mask);
@@ -207,14 +207,14 @@
return ret;
}
-static int enable_flash_sis530(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
+static int enable_flash_sis530(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
{
- return enable_flash_sis5x0(cfg, dev, name, 0x20, 0x04);
+ return enable_flash_sis5x0(flashprog, cfg, dev, name, 0x20, 0x04);
}
-static int enable_flash_sis540(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
+static int enable_flash_sis540(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
{
- return enable_flash_sis5x0(cfg, dev, name, 0x80, 0x40);
+ return enable_flash_sis5x0(flashprog, cfg, dev, name, 0x80, 0x40);
}
/* Datasheet:
@@ -223,7 +223,7 @@
* - PDF: http://www.intel.com/design/intarch/datashts/29056201.pdf
* - Order Number: 290562-001
*/
-static int enable_flash_piix4(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
+static int enable_flash_piix4(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
{
uint16_t old, new;
uint16_t xbcs = 0x4e; /* X-Bus Chip Select register. */
@@ -380,7 +380,7 @@
return enable_flash_ich_bios_cntl_common(ich_generation, addr, NULL, 0);
}
-static int enable_flash_ich_fwh_decode(const struct programmer_cfg *cfg, struct pci_dev *dev, enum ich_chipset ich_generation)
+static int enable_flash_ich_fwh_decode(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, enum ich_chipset ich_generation)
{
uint8_t fwh_sel1 = 0, fwh_sel2 = 0, fwh_dec_en_lo = 0, fwh_dec_en_hi = 0; /* silence compilers */
bool implemented = 0;
@@ -555,36 +555,36 @@
return 0;
}
-static int enable_flash_ich_fwh(const struct programmer_cfg *cfg, struct pci_dev *dev, enum ich_chipset ich_generation, uint8_t bios_cntl)
+static int enable_flash_ich_fwh(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, enum ich_chipset ich_generation, uint8_t bios_cntl)
{
int err;
/* Configure FWH IDSEL decoder maps. */
- if ((err = enable_flash_ich_fwh_decode(cfg, dev, ich_generation)) != 0)
+ if ((err = enable_flash_ich_fwh_decode(flashprog, cfg, dev, ich_generation)) != 0)
return err;
internal_buses_supported &= BUS_FWH;
return enable_flash_ich_bios_cntl_config_space(dev, ich_generation, bios_cntl);
}
-static int enable_flash_ich0(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
+static int enable_flash_ich0(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
{
- return enable_flash_ich_fwh(cfg, dev, CHIPSET_ICH, 0x4e);
+ return enable_flash_ich_fwh(flashprog, cfg, dev, CHIPSET_ICH, 0x4e);
}
-static int enable_flash_ich2345(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
+static int enable_flash_ich2345(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
{
- return enable_flash_ich_fwh(cfg, dev, CHIPSET_ICH2345, 0x4e);
+ return enable_flash_ich_fwh(flashprog, cfg, dev, CHIPSET_ICH2345, 0x4e);
}
-static int enable_flash_ich6(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
+static int enable_flash_ich6(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
{
- return enable_flash_ich_fwh(cfg, dev, CHIPSET_ICH6, 0xdc);
+ return enable_flash_ich_fwh(flashprog, cfg, dev, CHIPSET_ICH6, 0xdc);
}
-static int enable_flash_poulsbo(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
+static int enable_flash_poulsbo(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
{
- return enable_flash_ich_fwh(cfg, dev, CHIPSET_POULSBO, 0xd8);
+ return enable_flash_ich_fwh(flashprog, cfg, dev, CHIPSET_POULSBO, 0xd8);
}
static enum chipbustype enable_flash_ich_report_gcs(
@@ -770,7 +770,7 @@
return boot_straps[bbs].bus;
}
-static int enable_flash_ich_spi(const struct programmer_cfg *cfg, struct pci_dev *dev, enum ich_chipset ich_generation, uint8_t bios_cntl)
+static int enable_flash_ich_spi(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, enum ich_chipset ich_generation, uint8_t bios_cntl)
{
/* Get physical address of Root Complex Register Block */
uint32_t rcra = pci_read_long(dev, 0xf0) & 0xffffc000;
@@ -784,7 +784,7 @@
const enum chipbustype boot_buses = enable_flash_ich_report_gcs(dev, ich_generation, rcrb);
/* Handle FWH-related parameters and initialization */
- int ret_fwh = enable_flash_ich_fwh(cfg, dev, ich_generation, bios_cntl);
+ int ret_fwh = enable_flash_ich_fwh(flashprog, cfg, dev, ich_generation, bios_cntl);
if (ret_fwh == ERROR_FLASHROM_FATAL)
return ret_fwh;
@@ -817,7 +817,7 @@
void *spibar = rcrb + spibar_offset;
/* This adds BUS_SPI */
- int ret_spi = ich_init_spi(cfg, spibar, ich_generation);
+ int ret_spi = ich_init_spi(flashprog, cfg, spibar, ich_generation);
if (ret_spi == ERROR_FLASHROM_FATAL)
return ret_spi;
@@ -831,82 +831,82 @@
return 0;
}
-static int enable_flash_tunnelcreek(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
+static int enable_flash_tunnelcreek(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
{
- return enable_flash_ich_spi(cfg, dev, CHIPSET_TUNNEL_CREEK, 0xd8);
+ return enable_flash_ich_spi(flashprog, cfg, dev, CHIPSET_TUNNEL_CREEK, 0xd8);
}
-static int enable_flash_s12x0(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
+static int enable_flash_s12x0(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
{
- return enable_flash_ich_spi(cfg, dev, CHIPSET_CENTERTON, 0xd8);
+ return enable_flash_ich_spi(flashprog, cfg, dev, CHIPSET_CENTERTON, 0xd8);
}
-static int enable_flash_ich7(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
+static int enable_flash_ich7(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
{
- return enable_flash_ich_spi(cfg, dev, CHIPSET_ICH7, 0xdc);
+ return enable_flash_ich_spi(flashprog, cfg, dev, CHIPSET_ICH7, 0xdc);
}
-static int enable_flash_ich8(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
+static int enable_flash_ich8(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
{
- return enable_flash_ich_spi(cfg, dev, CHIPSET_ICH8, 0xdc);
+ return enable_flash_ich_spi(flashprog, cfg, dev, CHIPSET_ICH8, 0xdc);
}
-static int enable_flash_ich9(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
+static int enable_flash_ich9(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
{
- return enable_flash_ich_spi(cfg, dev, CHIPSET_ICH9, 0xdc);
+ return enable_flash_ich_spi(flashprog, cfg, dev, CHIPSET_ICH9, 0xdc);
}
-static int enable_flash_ich10(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
+static int enable_flash_ich10(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
{
- return enable_flash_ich_spi(cfg, dev, CHIPSET_ICH10, 0xdc);
+ return enable_flash_ich_spi(flashprog, cfg, dev, CHIPSET_ICH10, 0xdc);
}
/* Ibex Peak aka. 5 series & 3400 series */
-static int enable_flash_pch5(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
+static int enable_flash_pch5(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
{
- return enable_flash_ich_spi(cfg, dev, CHIPSET_5_SERIES_IBEX_PEAK, 0xdc);
+ return enable_flash_ich_spi(flashprog, cfg, dev, CHIPSET_5_SERIES_IBEX_PEAK, 0xdc);
}
/* Cougar Point aka. 6 series & c200 series */
-static int enable_flash_pch6(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
+static int enable_flash_pch6(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
{
- return enable_flash_ich_spi(cfg, dev, CHIPSET_6_SERIES_COUGAR_POINT, 0xdc);
+ return enable_flash_ich_spi(flashprog, cfg, dev, CHIPSET_6_SERIES_COUGAR_POINT, 0xdc);
}
/* Panther Point aka. 7 series */
-static int enable_flash_pch7(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
+static int enable_flash_pch7(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
{
- return enable_flash_ich_spi(cfg, dev, CHIPSET_7_SERIES_PANTHER_POINT, 0xdc);
+ return enable_flash_ich_spi(flashprog, cfg, dev, CHIPSET_7_SERIES_PANTHER_POINT, 0xdc);
}
/* Lynx Point aka. 8 series */
-static int enable_flash_pch8(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
+static int enable_flash_pch8(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
{
- return enable_flash_ich_spi(cfg, dev, CHIPSET_8_SERIES_LYNX_POINT, 0xdc);
+ return enable_flash_ich_spi(flashprog, cfg, dev, CHIPSET_8_SERIES_LYNX_POINT, 0xdc);
}
/* Lynx Point LP aka. 8 series low-power */
-static int enable_flash_pch8_lp(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
+static int enable_flash_pch8_lp(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
{
- return enable_flash_ich_spi(cfg, dev, CHIPSET_8_SERIES_LYNX_POINT_LP, 0xdc);
+ return enable_flash_ich_spi(flashprog, cfg, dev, CHIPSET_8_SERIES_LYNX_POINT_LP, 0xdc);
}
/* Wellsburg (for Haswell-EP Xeons) */
-static int enable_flash_pch8_wb(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
+static int enable_flash_pch8_wb(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
{
- return enable_flash_ich_spi(cfg, dev, CHIPSET_8_SERIES_WELLSBURG, 0xdc);
+ return enable_flash_ich_spi(flashprog, cfg, dev, CHIPSET_8_SERIES_WELLSBURG, 0xdc);
}
/* Wildcat Point */
-static int enable_flash_pch9(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
+static int enable_flash_pch9(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
{
- return enable_flash_ich_spi(cfg, dev, CHIPSET_9_SERIES_WILDCAT_POINT, 0xdc);
+ return enable_flash_ich_spi(flashprog, cfg, dev, CHIPSET_9_SERIES_WILDCAT_POINT, 0xdc);
}
/* Wildcat Point LP */
-static int enable_flash_pch9_lp(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
+static int enable_flash_pch9_lp(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
{
- return enable_flash_ich_spi(cfg, dev, CHIPSET_9_SERIES_WILDCAT_POINT_LP, 0xdc);
+ return enable_flash_ich_spi(flashprog, cfg, dev, CHIPSET_9_SERIES_WILDCAT_POINT_LP, 0xdc);
}
/* Sunrise Point */
@@ -916,7 +916,7 @@
return 0;
}
-static int enable_flash_pch100_or_c620(const struct programmer_cfg *cfg,
+static int enable_flash_pch100_or_c620(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg,
struct pci_dev *const dev, const char *const name,
const int slot, const int func, const enum ich_chipset pch_generation)
{
@@ -961,7 +961,7 @@
msg_pdbg("SPIBAR = 0x%0*" PRIxPTR " (phys = 0x%08x)\n", PRIxPTR_WIDTH, (uintptr_t)spibar, phys_spibar);
/* This adds BUS_SPI */
- const int ret_spi = ich_init_spi(cfg, spibar, pch_generation);
+ const int ret_spi = ich_init_spi(flashprog, cfg, spibar, pch_generation);
if (ret_spi != ERROR_FLASHROM_FATAL) {
if (ret_bc || ret_spi)
ret = ERROR_FLASHROM_NONFATAL;
@@ -979,59 +979,59 @@
return ret;
}
-static int enable_flash_pch100(const struct programmer_cfg *cfg, struct pci_dev *const dev, const char *const name)
+static int enable_flash_pch100(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *const dev, const char *const name)
{
- return enable_flash_pch100_or_c620(cfg, dev, name, 0x1f, 5, CHIPSET_100_SERIES_SUNRISE_POINT);
+ return enable_flash_pch100_or_c620(flashprog, cfg, dev, name, 0x1f, 5, CHIPSET_100_SERIES_SUNRISE_POINT);
}
-static int enable_flash_c620(const struct programmer_cfg *cfg, struct pci_dev *const dev, const char *const name)
+static int enable_flash_c620(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *const dev, const char *const name)
{
- return enable_flash_pch100_or_c620(cfg, dev, name, 0x1f, 5, CHIPSET_C620_SERIES_LEWISBURG);
+ return enable_flash_pch100_or_c620(flashprog, cfg, dev, name, 0x1f, 5, CHIPSET_C620_SERIES_LEWISBURG);
}
-static int enable_flash_pch300(const struct programmer_cfg *cfg, struct pci_dev *const dev, const char *const name)
+static int enable_flash_pch300(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *const dev, const char *const name)
{
- return enable_flash_pch100_or_c620(cfg, dev, name, 0x1f, 5, CHIPSET_300_SERIES_CANNON_POINT);
+ return enable_flash_pch100_or_c620(flashprog, cfg, dev, name, 0x1f, 5, CHIPSET_300_SERIES_CANNON_POINT);
}
-static int enable_flash_pch400(const struct programmer_cfg *cfg, struct pci_dev *const dev, const char *const name)
+static int enable_flash_pch400(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *const dev, const char *const name)
{
- return enable_flash_pch100_or_c620(cfg, dev, name, 0x1f, 5, CHIPSET_400_SERIES_COMET_POINT);
+ return enable_flash_pch100_or_c620(flashprog, cfg, dev, name, 0x1f, 5, CHIPSET_400_SERIES_COMET_POINT);
}
-static int enable_flash_pch500(const struct programmer_cfg *cfg, struct pci_dev *const dev, const char *const name)
+static int enable_flash_pch500(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *const dev, const char *const name)
{
- return enable_flash_pch100_or_c620(cfg, dev, name, 0x1f, 5, CHIPSET_500_SERIES_TIGER_POINT);
+ return enable_flash_pch100_or_c620(flashprog, cfg, dev, name, 0x1f, 5, CHIPSET_500_SERIES_TIGER_POINT);
}
-static int enable_flash_pch600(const struct programmer_cfg *cfg, struct pci_dev *const dev, const char *const name)
+static int enable_flash_pch600(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *const dev, const char *const name)
{
- return enable_flash_pch100_or_c620(cfg, dev, name, 0x1f, 5, CHIPSET_600_SERIES_ALDER_POINT);
+ return enable_flash_pch100_or_c620(flashprog, cfg, dev, name, 0x1f, 5, CHIPSET_600_SERIES_ALDER_POINT);
}
-static int enable_flash_mtl(const struct programmer_cfg *cfg, struct pci_dev *const dev, const char *const name)
+static int enable_flash_mtl(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *const dev, const char *const name)
{
- return enable_flash_pch100_or_c620(cfg, dev, name, 0x1f, 5, CHIPSET_METEOR_LAKE);
+ return enable_flash_pch100_or_c620(flashprog, cfg, dev, name, 0x1f, 5, CHIPSET_METEOR_LAKE);
}
-static int enable_flash_mcc(const struct programmer_cfg *cfg, struct pci_dev *const dev, const char *const name)
+static int enable_flash_mcc(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *const dev, const char *const name)
{
- return enable_flash_pch100_or_c620(cfg, dev, name, 0x1f, 5, CHIPSET_ELKHART_LAKE);
+ return enable_flash_pch100_or_c620(flashprog, cfg, dev, name, 0x1f, 5, CHIPSET_ELKHART_LAKE);
}
-static int enable_flash_jsl(const struct programmer_cfg *cfg, struct pci_dev *const dev, const char *const name)
+static int enable_flash_jsl(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *const dev, const char *const name)
{
- return enable_flash_pch100_or_c620(cfg, dev, name, 0x1f, 5, CHIPSET_JASPER_LAKE);
+ return enable_flash_pch100_or_c620(flashprog, cfg, dev, name, 0x1f, 5, CHIPSET_JASPER_LAKE);
}
-static int enable_flash_apl(const struct programmer_cfg *cfg, struct pci_dev *const dev, const char *const name)
+static int enable_flash_apl(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *const dev, const char *const name)
{
- return enable_flash_pch100_or_c620(cfg, dev, name, 0x0d, 2, CHIPSET_APOLLO_LAKE);
+ return enable_flash_pch100_or_c620(flashprog, cfg, dev, name, 0x0d, 2, CHIPSET_APOLLO_LAKE);
}
-static int enable_flash_glk(const struct programmer_cfg *cfg, struct pci_dev *const dev, const char *const name)
+static int enable_flash_glk(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *const dev, const char *const name)
{
- return enable_flash_pch100_or_c620(cfg, dev, name, 0x0d, 2, CHIPSET_GEMINI_LAKE);
+ return enable_flash_pch100_or_c620(flashprog, cfg, dev, name, 0x0d, 2, CHIPSET_GEMINI_LAKE);
}
/* Silvermont architecture: Bay Trail(-T/-I), Avoton/Rangeley.
@@ -1044,7 +1044,7 @@
* - SPIBAR (coined SBASE) at LPC config 0x54 (instead of [RCRB] + 0x3800).
* - BIOS_CNTL (coined BCR) at [SPIBAR] + 0xFC (instead of LPC config 0xDC).
*/
-static int enable_flash_silvermont(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
+static int enable_flash_silvermont(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
{
enum ich_chipset ich_generation = CHIPSET_BAYTRAIL;
@@ -1060,7 +1060,7 @@
physunmap(rcrb, 4);
/* Handle fwh_idsel parameter */
- int ret_fwh = enable_flash_ich_fwh_decode(cfg, dev, ich_generation);
+ int ret_fwh = enable_flash_ich_fwh_decode(flashprog, cfg, dev, ich_generation);
if (ret_fwh == ERROR_FLASHROM_FATAL)
return ret_fwh;
@@ -1078,7 +1078,7 @@
*/
enable_flash_ich_bios_cntl_memmapped(ich_generation, spibar + 0xFC);
- int ret_spi = ich_init_spi(cfg, spibar, ich_generation);
+ int ret_spi = ich_init_spi(flashprog, cfg, spibar, ich_generation);
if (ret_spi == ERROR_FLASHROM_FATAL)
return ret_spi;
@@ -1092,7 +1092,7 @@
return 0;
}
-static int via_no_byte_merge(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
+static int via_no_byte_merge(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
{
uint8_t val;
@@ -1105,7 +1105,7 @@
return NOT_DONE_YET; /* need to find south bridge, too */
}
-static int enable_flash_vt823x(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
+static int enable_flash_vt823x(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
{
uint8_t val;
@@ -1132,7 +1132,7 @@
return 0;
}
-static int enable_flash_vt_vx(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
+static int enable_flash_vt_vx(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
{
struct pci_dev *south_north = pcidev_find(0x1106, 0xa353);
if (south_north == NULL) {
@@ -1143,7 +1143,7 @@
msg_pdbg("Strapped to ");
if ((pci_read_byte(south_north, 0x56) & 0x01) == 0) {
msg_pdbg("LPC.\n");
- return enable_flash_vt823x(cfg, dev, name);
+ return enable_flash_vt823x(flashprog, cfg, dev, name);
}
msg_pdbg("SPI.\n");
@@ -1196,12 +1196,12 @@
return via_init_spi(spi0_mm_base);
}
-static int enable_flash_vt8237s_spi(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
+static int enable_flash_vt8237s_spi(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
{
return via_init_spi(pci_read_long(dev, 0xbc) << 8);
}
-static int enable_flash_cs5530(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
+static int enable_flash_cs5530(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
{
uint8_t reg8;
@@ -1265,7 +1265,7 @@
* To enable write to NOR Boot flash for the benefit of systems that have such
* a setup, raise MSR 0x51400018 WE_CS3 (write enable Boot Flash Chip Select).
*/
-static int enable_flash_cs5536(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
+static int enable_flash_cs5536(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
{
#define MSR_RCONF_DEFAULT 0x1808
#define MSR_NORF_CTL 0x51400018
@@ -1294,7 +1294,7 @@
return 0;
}
-static int enable_flash_sc1100(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
+static int enable_flash_sc1100(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
{
#define SC_REG 0x52
uint8_t new;
@@ -1319,7 +1319,7 @@
* 6 FFB0_0000h–FFBF_FFFFh <- FFF80000h-FFFDFFFFh <- <-
* 5 00E8... <- <- FFF00000h-FFF7FFFFh <-
*/
-static int enable_flash_amd_via(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name, uint8_t decode_val)
+static int enable_flash_amd_via(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name, uint8_t decode_val)
{
#define AMD_MAPREG 0x43
#define AMD_ENREG 0x40
@@ -1353,29 +1353,29 @@
return 0;
}
-static int enable_flash_amd_768_8111(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
+static int enable_flash_amd_768_8111(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
{
/* Enable decoding of 0xFFB00000 to 0xFFFFFFFF (5 MB). */
max_rom_decode.lpc = 5 * 1024 * 1024;
- return enable_flash_amd_via(cfg, dev, name, 0xC0);
+ return enable_flash_amd_via(flashprog, cfg, dev, name, 0xC0);
}
-static int enable_flash_vt82c586(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
+static int enable_flash_vt82c586(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
{
/* Enable decoding of 0xFFF80000 to 0xFFFFFFFF. (512 kB) */
max_rom_decode.parallel = 512 * 1024;
- return enable_flash_amd_via(cfg, dev, name, 0xC0);
+ return enable_flash_amd_via(flashprog, cfg, dev, name, 0xC0);
}
/* Works for VT82C686A/B too. */
-static int enable_flash_vt82c596(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
+static int enable_flash_vt82c596(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
{
/* Enable decoding of 0xFFF00000 to 0xFFFFFFFF. (1 MB) */
max_rom_decode.parallel = 1024 * 1024;
- return enable_flash_amd_via(cfg, dev, name, 0xE0);
+ return enable_flash_amd_via(flashprog, cfg, dev, name, 0xE0);
}
-static int enable_flash_sb600(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
+static int enable_flash_sb600(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
{
uint32_t prot;
uint8_t reg;
@@ -1408,7 +1408,7 @@
internal_buses_supported &= BUS_LPC | BUS_FWH;
- ret = sb600_probe_spi(cfg, dev);
+ ret = sb600_probe_spi(flashprog, cfg, dev);
/* Read ROM strap override register. */
OUTB(0x8f, 0xcd6);
@@ -1449,7 +1449,7 @@
}
/* sets bit 0 in 0x6d */
-static int enable_flash_nvidia_common(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
+static int enable_flash_nvidia_common(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
{
uint8_t old, new;
@@ -1466,16 +1466,16 @@
return 0;
}
-static int enable_flash_nvidia_nforce2(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
+static int enable_flash_nvidia_nforce2(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
{
rpci_write_byte(dev, 0x92, 0);
- if (enable_flash_nvidia_common(cfg, dev, name))
+ if (enable_flash_nvidia_common(flashprog, cfg, dev, name))
return ERROR_FLASHROM_NONFATAL;
else
return 0;
}
-static int enable_flash_ck804(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
+static int enable_flash_ck804(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
{
uint32_t segctrl;
uint8_t reg, old, new;
@@ -1541,7 +1541,7 @@
}
}
- if (enable_flash_nvidia_common(cfg, dev, name))
+ if (enable_flash_nvidia_common(flashprog, cfg, dev, name))
err++;
if (err > 0)
@@ -1550,7 +1550,7 @@
return 0;
}
-static int enable_flash_osb4(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
+static int enable_flash_osb4(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
{
uint8_t tmp;
@@ -1568,7 +1568,7 @@
}
/* ATI Technologies Inc IXP SB400 PCI-ISA Bridge (rev 80) */
-static int enable_flash_sb400(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
+static int enable_flash_sb400(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
{
uint8_t tmp;
struct pci_dev *smbusdev;
@@ -1603,7 +1603,7 @@
return 0;
}
-static int enable_flash_mcp55(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
+static int enable_flash_mcp55(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
{
uint8_t val;
uint16_t wordval;
@@ -1619,7 +1619,7 @@
wordval |= 0x7fff; /* 16M */
rpci_write_word(dev, 0x90, wordval);
- if (enable_flash_nvidia_common(cfg, dev, name))
+ if (enable_flash_nvidia_common(flashprog, cfg, dev, name))
return ERROR_FLASHROM_NONFATAL;
else
return 0;
@@ -1630,7 +1630,7 @@
* It is assumed that LPC chips need the MCP55 code and SPI chips need the
* code provided in enable_flash_mcp6x_7x_common.
*/
-static int enable_flash_mcp6x_7x(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
+static int enable_flash_mcp6x_7x(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
{
int ret = 0, want_spi = 0;
uint8_t val;
@@ -1642,7 +1642,7 @@
switch ((val >> 5) & 0x3) {
case 0x0:
- ret = enable_flash_mcp55(cfg, dev, name);
+ ret = enable_flash_mcp55(flashprog, cfg, dev, name);
internal_buses_supported &= BUS_LPC;
msg_pdbg("Flash bus type is LPC\n");
break;
@@ -1681,7 +1681,7 @@
return ret;
}
-static int enable_flash_ht1000(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
+static int enable_flash_ht1000(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
{
uint8_t val;
@@ -1704,7 +1704,7 @@
* complete flash is mapped somewhere below 1G. The position can be determined
* by the BOOTCS PAR register.
*/
-static int get_flashbase_sc520(const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
+static int get_flashbase_sc520(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name)
{
int i, bootcs_found = 0;
uint32_t parx = 0;
@@ -2184,7 +2184,7 @@
{0},
};
-int chipset_flash_enable(const struct programmer_cfg *cfg)
+int chipset_flash_enable(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg)
{
struct pci_dev *dev = NULL;
int ret = -2; /* Nothing! */
@@ -2233,7 +2233,7 @@
continue;
}
msg_pinfo("Enabling flash write... ");
- ret = chipset_enables[i].doit(cfg, dev, chipset_enables[i].device_name);
+ ret = chipset_enables[i].doit(flashprog, cfg, dev, chipset_enables[i].device_name);
if (ret == NOT_DONE_YET) {
ret = -2;
msg_pinfo("OK - searching further chips.\n");
diff --git a/ichspi.c b/ichspi.c
index 1522d2b..1aae99b 100644
--- a/ichspi.c
+++ b/ichspi.c
@@ -2104,7 +2104,7 @@
}
}
-static int init_ich_default(const struct programmer_cfg *cfg, void *spibar, enum ich_chipset ich_gen)
+static int init_ich_default(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, void *spibar, enum ich_chipset ich_gen)
{
unsigned int i;
uint16_t tmp2;
@@ -2356,7 +2356,7 @@
return 0;
}
-int ich_init_spi(const struct programmer_cfg *cfg, void *spibar, enum ich_chipset ich_gen)
+int ich_init_spi(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, void *spibar, enum ich_chipset ich_gen)
{
ich_generation = ich_gen;
ich_spibar = spibar;
@@ -2368,7 +2368,7 @@
return init_ich7_spi(spibar, ich_gen);
case CHIPSET_ICH8:
default: /* Future version might behave the same */
- return init_ich_default(cfg, spibar, ich_gen);
+ return init_ich_default(flashprog, cfg, spibar, ich_gen);
}
}
diff --git a/include/programmer.h b/include/programmer.h
index 712aee6..9f807c5 100644
--- a/include/programmer.h
+++ b/include/programmer.h
@@ -147,7 +147,7 @@
const enum test_state status;
const char *vendor_name;
const char *device_name;
- int (*doit) (const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name);
+ int (*doit) (struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev, const char *name);
};
extern const struct penable chipset_enables[];
@@ -229,7 +229,7 @@
int board_flash_enable(const char *vendor, const char *model, const char *cb_vendor, const char *cb_model, bool force_boardenable);
/* chipset_enable.c */
-int chipset_flash_enable(const struct programmer_cfg *cfg);
+int chipset_flash_enable(struct flashrom_programmer *, const struct programmer_cfg *cfg);
/* processor_enable.c */
int processor_flash_enable(void);
@@ -362,7 +362,7 @@
/* ichspi.c */
#if CONFIG_INTERNAL == 1
-int ich_init_spi(const struct programmer_cfg *cfg, void *spibar, enum ich_chipset ich_generation);
+int ich_init_spi(struct flashrom_programmer *, const struct programmer_cfg *cfg, void *spibar, enum ich_chipset ich_generation);
int via_init_spi(uint32_t mmio_base);
/* amd_imc.c */
@@ -390,7 +390,7 @@
/* sb600spi.c */
-int sb600_probe_spi(const struct programmer_cfg *cfg, struct pci_dev *dev);
+int sb600_probe_spi(struct flashrom_programmer *, const struct programmer_cfg *cfg, struct pci_dev *dev);
/* wbsio_spi.c */
int wbsio_check_for_spi(void);
diff --git a/internal.c b/internal.c
index c096475..c2e428f 100644
--- a/internal.c
+++ b/internal.c
@@ -259,7 +259,7 @@
/* try to enable it. Failure IS an option, since not all motherboards
* really need this to be done, etc., etc.
*/
- ret = chipset_flash_enable(cfg);
+ ret = chipset_flash_enable(flashprog, cfg);
if (ret == -2) {
msg_perr("WARNING: No chipset found. Flash detection "
"will most likely fail.\n");
diff --git a/sb600spi.c b/sb600spi.c
index 5b9ac45..5809431 100644
--- a/sb600spi.c
+++ b/sb600spi.c
@@ -634,7 +634,7 @@
.probe_opcode = default_spi_probe_opcode,
};
-int sb600_probe_spi(const struct programmer_cfg *cfg, struct pci_dev *dev)
+int sb600_probe_spi(struct flashrom_programmer *flashprog, const struct programmer_cfg *cfg, struct pci_dev *dev)
{
struct pci_dev *smbus_dev;
uint32_t tmp;
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