Alan Green has uploaded this change for review.

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flashchips.c: Take GD25LQ128C/D from downstream

Take the diffs for GD25LQ128C/D from the ChromiumOS flashrom repo.

This chips was added in Chromium OS `commit 62cd8106` by
furquan@google.com on 2016-07-18, and has been marked tested.

Signed-off-by: Alan Green <avg@google.com>
Change-Id: I4358392520507ddbfc654feb49fa982d49db2f28
---
M flashchips.c
1 file changed, 2 insertions(+), 3 deletions(-)

git pull ssh://review.coreboot.org:29418/flashrom refs/changes/78/35478/1

diff --git a/flashchips.c b/flashchips.c
index 3994c93..5c797fd 100644
--- a/flashchips.c
+++ b/flashchips.c
@@ -5894,7 +5894,7 @@
 		.page_size	= 256,
 		/* OTP: 1024B total, 256B reserved; read 0x48; write 0x42, erase 0x44 */
 		.feature_bits	= FEATURE_WRSR_WREN | FEATURE_OTP,
-		.tested		= TEST_UNTESTED,
+		.tested		= TEST_OK_PREW,
 		.probe		= probe_spi_rdid,
 		.probe_timing	= TIMING_ZERO,
 		.block_erasers	=
@@ -5916,8 +5916,7 @@
 				.block_erase = spi_block_erase_c7,
 			}
 		},
-		.printlock	= spi_prettyprint_status_register_bp4_srwd,
-		.unlock		= spi_disable_blockprotect_bp4_srwd, /* TODO: 2nd status reg (read with 0x35) */
+		.unlock		= spi_disable_blockprotect,
 		.write		= spi_chip_write_256,
 		.read		= spi_chip_read, /* Fast read (0x0B) and multi I/O supported */
 		.voltage	= {1695, 1950},

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