Sorry for being late. There are some rather invisible issues,
hard to get right for the first chip:

• We currently try to align the flashchips.c with the Chromium fork, so entries have to stay
• sorted by .vendor and .name.
• Our 4BA support assumes that 4BA erase functions are listed explicitly and before each regular erase function of the same size.

View Change

3 comments:

• File flashchips.c:

  • Patch Set #2, Line 7789: .tested = TEST_OK_PREW,

    This tells me that probe, read, erase and write are working (or should be)

    What was tested should be mentioned in the commit message.

  • Patch Set #2, Line 7796: .block_erase = spi_block_erase_20,

    There should also be native 4-byte address (4BA) functions: 21/5c/dc.
    The 4BA should be mentioned first. See MX25L25635F, for instance.

  • Patch Set #2, Line 7815: /* 2.35-3.6V for MX25L51245G */

    The datasheet says 2.7V, and why is this a comment if the whole entry is for
    the MX25L51245G?

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