Anastasia Klimchuk submitted this change.
flashchips.c: Add write protect support for W25Q16.V
Enable WRSR2 feature flag and define reg_bits and decode_range for
W25Q16.V to enable write protect support.
Based on W25Q16DV, Revision: 1, Release: Nov 18 2014 datasheet
TEST=flashrom --wp-{enable,disable,range,list,status}
Change-Id: I6c0b35f82b47a1169bccfd08222e9e3b3be30d75
Signed-off-by: Khoa Hoang <admin@khoahoang.com>
Signed-off-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/67713
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>
---
M flashchips.c
1 file changed, 12 insertions(+), 2 deletions(-)
diff --git a/flashchips.c b/flashchips.c
index 6a5cf49..ccc1e8c 100644
--- a/flashchips.c
+++ b/flashchips.c
@@ -17888,8 +17888,8 @@
.page_size = 256,
/* supports SFDP */
/* OTP: 1024B total, 256B reserved; read 0x48; write 0x42, erase 0x44, read ID 0x4B */
- .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP,
- .tested = TEST_OK_PREW,
+ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_WRSR2,
+ .tested = TEST_OK_PREWB,
.probe = PROBE_SPI_RDID,
.probe_timing = TIMING_ZERO,
.block_erasers =
@@ -17916,6 +17916,16 @@
.write = SPI_CHIP_WRITE256,
.read = SPI_CHIP_READ,
.voltage = {2700, 3600},
+ .reg_bits =
+ {
+ .srp = {STATUS1, 7, RW},
+ .srl = {STATUS2, 0, RW},
+ .bp = {{STATUS1, 2, RW}, {STATUS1, 3, RW}, {STATUS1, 4, RW}},
+ .tb = {STATUS1, 5, RW},
+ .sec = {STATUS1, 6, RW},
+ .cmp = {STATUS2, 6, RW},
+ },
+ .decode_range = DECODE_RANGE_SPI25,
},
{
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