Edward O'Callaghan has uploaded this change for review.

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sb600spi -> fchspi: Rename AMD SPI programmer

The AMD FCH controller has two main SPI ip core variants, the so-called
'sb600' variant and the newer 'spi100' variant. The sb600spi.c driver
supports both variants and so its name isn't very general. Here we
rename it to be more general.

Change-Id: Iad92fb224954d66968e7aeb75cb515f075a26ac8
Signed-off-by: Edward O'Callaghan <quasisec@chromium.org>
M Makefile
M chipset_enable.c
R fchspi.c
M meson.build
M programmer.h
5 files changed, 11 insertions(+), 11 deletions(-)

git pull ssh://review.coreboot.org:29418/flashrom refs/changes/34/36434/1
diff --git a/Makefile b/Makefile
index f0a1b61..143a8c1 100644
--- a/Makefile
+++ b/Makefile
@@ -767,7 +767,7 @@
PROGRAMMER_OBJS += processor_enable.o chipset_enable.o board_enable.o cbtable.o internal.o
ifeq ($(ARCH), x86)
-PROGRAMMER_OBJS += it87spi.o it85spi.o sb600spi.o amd_imc.o wbsio_spi.o mcp6x_spi.o
+PROGRAMMER_OBJS += it87spi.o it85spi.o fchspi.o amd_imc.o wbsio_spi.o mcp6x_spi.o
PROGRAMMER_OBJS += ichspi.o dmi.o
ifeq ($(CONFIG_INTERNAL_DMI), yes)
diff --git a/chipset_enable.c b/chipset_enable.c
index b55852c..e57a18e 100644
--- a/chipset_enable.c
+++ b/chipset_enable.c
@@ -1297,7 +1297,7 @@
return enable_flash_amd_via(dev, name, 0xE0);

-static int enable_flash_sb600(struct pci_dev *dev, const char *name)
+static int enable_flash_fch(struct pci_dev *dev, const char *name)
uint32_t prot;
uint8_t reg;
@@ -1330,7 +1330,7 @@

internal_buses_supported &= BUS_LPC | BUS_FWH;

- ret = sb600_probe_spi(dev);
+ ret = fch_probe_spi(dev);

/* Read ROM strap override register. */
OUTB(0x8f, 0xcd6);
@@ -1685,16 +1685,16 @@
const struct penable chipset_enables[] = {
#if defined(__i386__) || defined(__x86_64__)
{0x1002, 0x4377, B_PFL, OK, "ATI", "SB400", enable_flash_sb400},
- {0x1002, 0x438d, B_FLS, OK, "AMD", "SB600", enable_flash_sb600},
- {0x1002, 0x439d, B_FLS, OK, "AMD", "SB7x0/SB8x0/SB9x0", enable_flash_sb600},
+ {0x1002, 0x438d, B_FLS, OK, "AMD", "SB600", enable_flash_fch},
+ {0x1002, 0x439d, B_FLS, OK, "AMD", "SB7x0/SB8x0/SB9x0", enable_flash_fch},
{0x100b, 0x0510, B_PFL, NT, "AMD", "SC1100", enable_flash_sc1100},
{0x1022, 0x2080, B_PFL, OK, "AMD", "CS5536", enable_flash_cs5536},
{0x1022, 0x2090, B_PFL, OK, "AMD", "CS5536", enable_flash_cs5536},
{0x1022, 0x3000, B_PFL, OK, "AMD", "Elan SC520", get_flashbase_sc520},
{0x1022, 0x7440, B_PFL, OK, "AMD", "AMD-768", enable_flash_amd_768_8111},
{0x1022, 0x7468, B_PFL, OK, "AMD", "AMD-8111", enable_flash_amd_768_8111},
- {0x1022, 0x780e, B_FLS, OK, "AMD", "FCH", enable_flash_sb600},
- {0x1022, 0x790e, B_FLS, OK, "AMD", "FP4", enable_flash_sb600},
+ {0x1022, 0x780e, B_FLS, OK, "AMD", "FCH", enable_flash_fch},
+ {0x1022, 0x790e, B_FLS, OK, "AMD", "FP4", enable_flash_fch},
{0x1039, 0x0406, B_PFL, NT, "SiS", "501/5101/5501", enable_flash_sis501},
{0x1039, 0x0496, B_PFL, NT, "SiS", "85C496+497", enable_flash_sis85c496},
{0x1039, 0x0530, B_PFL, OK, "SiS", "530", enable_flash_sis530},
diff --git a/sb600spi.c b/fchspi.c
similarity index 99%
rename from sb600spi.c
rename to fchspi.c
index 7bdd11f..e0eab07 100644
--- a/sb600spi.c
+++ b/fchspi.c
@@ -579,7 +579,7 @@
return amd_imc_shutdown(dev);

-int sb600_probe_spi(struct pci_dev *dev)
+int fch_probe_spi(struct pci_dev *dev)
struct pci_dev *smbus_dev;
uint32_t tmp;
diff --git a/meson.build b/meson.build
index d1f663f..d4bbff7 100644
--- a/meson.build
+++ b/meson.build
@@ -182,7 +182,7 @@
srcs += 'it85spi.c'
srcs += 'it87spi.c'
srcs += 'mcp6x_spi.c'
- srcs += 'sb600spi.c'
+ srcs += 'fchspi.c'
srcs += 'wbsio_spi.c'
config_bitbang_spi = true
diff --git a/programmer.h b/programmer.h
index e42c6bb..e2cadd9 100644
--- a/programmer.h
+++ b/programmer.h
@@ -657,8 +657,8 @@
/* mcp6x_spi.c */
int mcp6x_spi_init(int want_spi);

-/* sb600spi.c */
-int sb600_probe_spi(struct pci_dev *dev);
+/* fchspi.c */
+int fch_probe_spi(struct pci_dev *dev);

/* wbsio_spi.c */
int wbsio_check_for_spi(void);

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Gerrit-Project: flashrom
Gerrit-Branch: master
Gerrit-Change-Id: Iad92fb224954d66968e7aeb75cb515f075a26ac8
Gerrit-Change-Number: 36434
Gerrit-PatchSet: 1
Gerrit-Owner: Edward O'Callaghan <quasisec@chromium.org>
Gerrit-MessageType: newchange