Anastasia Klimchuk submitted this change.
flashchips: Add support for chip model GD25LF128E
Adding GD25LF128E to flashchip.c
GD25LF128E: 1.8V 128Mbit, QE default fixed at 1.
Datasheet link
https://www.gigadevice.com.cn/Public/Uploads/uploadfile/files/20230627/DS-00632-GD25LF128E-Rev1.3.pdf
Change-Id: I71fdc7ea1aea69d14db6af3bac2da3e7bee8abbe
Signed-off-by: Victor Lim <vlim@gigadevice.com>
Signed-off-by: Anastasia Klimchuk <aklm@flashrom.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/82332
Reviewed-by: Nikolai Artemiev <nartemiev@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
M flashchips.c
M include/flashchips.h
2 files changed, 50 insertions(+), 0 deletions(-)
diff --git a/flashchips.c b/flashchips.c
index 80aab20..b4f957b 100644
--- a/flashchips.c
+++ b/flashchips.c
@@ -6538,6 +6538,55 @@
{
.vendor = "GigaDevice",
+ .name = "GD25LF128E",
+ .bustype = BUS_SPI,
+ .manufacture_id = GIGADEVICE_ID,
+ .model_id = GIGADEVICE_GD25LF128E,
+ .total_size = 16384,
+ .page_size = 256,
+ /* OTP: 1024B total, 256B reserved; read 0x48; write 0x42, erase 0x44 */
+ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_WRSR_EXT2,
+ .tested = TEST_OK_PREWB,
+ .probe = PROBE_SPI_RDID,
+ .probe_timing = TIMING_ZERO,
+ .block_erasers =
+ {
+ {
+ .eraseblocks = { {4 * 1024, 4096} },
+ .block_erase = SPI_BLOCK_ERASE_20,
+ }, {
+ .eraseblocks = { {32 * 1024, 512} },
+ .block_erase = SPI_BLOCK_ERASE_52,
+ }, {
+ .eraseblocks = { {64 * 1024, 256} },
+ .block_erase = SPI_BLOCK_ERASE_D8,
+ }, {
+ .eraseblocks = { {16 * 1024 * 1024, 1} },
+ .block_erase = SPI_BLOCK_ERASE_60,
+ }, {
+ .eraseblocks = { {16 * 1024 * 1024, 1} },
+ .block_erase = SPI_BLOCK_ERASE_C7,
+ }
+ },
+ .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_BP4_SRWD,
+ .unlock = SPI_DISABLE_BLOCKPROTECT_BP4_SRWD, /* TODO: 2nd status reg (read with 0x35) */
+ .write = SPI_CHIP_WRITE256,
+ .read = SPI_CHIP_READ, /* Fast read (0x0B) and multi I/O supported */
+ .voltage = {1695, 1950},
+ .reg_bits =
+ {
+ .srp = {STATUS1, 7, RW},
+ .srl = {STATUS2, 0, RW},
+ .bp = {{STATUS1, 2, RW}, {STATUS1, 3, RW}, {STATUS1, 4, RW}},
+ .tb = {STATUS1, 5, RW}, /* Called BP3 in datasheet, acts like TB */
+ .sec = {STATUS1, 6, RW}, /* Called BP4 in datasheet, acts like SEC */
+ .cmp = {STATUS2, 6, RW},
+ },
+ .decode_range = DECODE_RANGE_SPI25,
+ },
+
+ {
+ .vendor = "GigaDevice",
.name = "GD25LQ128C/GD25LQ128D/GD25LQ128E",
.bustype = BUS_SPI,
.manufacture_id = GIGADEVICE_ID,
diff --git a/include/flashchips.h b/include/flashchips.h
index 26c4cbc..2ec5aaf 100644
--- a/include/flashchips.h
+++ b/include/flashchips.h
@@ -404,6 +404,7 @@
#define GIGADEVICE_GD25LQ64 0x6017 /* Same as GD25LQ64B (which is faster) */
#define GIGADEVICE_GD25LQ128CD 0x6018
#define GIGADEVICE_GD25LQ255E 0x6019
+#define GIGADEVICE_GD25LF128E 0x6318
#define GIGADEVICE_GD25WQ80E 0x6514
#define GIGADEVICE_GD29GL064CAB 0x7E0601
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