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ichspi: Add support for C740 PCH

Clean commit 51e1d0e4b7670e5822560acc724a6a8dd00b6af4
'Add support for Intel Emmitsburg PCH' which broke
CHIPSET_5_SERIES_IBEX_PEAK detection and which assumes C740 is the same
as C620, while its more a close relative to Intel's H570 PCH.

Based on Intel SPI Programming Guide #619386.

Test: Run on Intel ArcherCity CRB with Intel's C741 PCH
      using the 'internal' programmer.
Test: Run on BMC and accessed the SPI flash chip over
      'linux_mtd' programmer.
Change-Id: I80eebc0fcc14de9df823aceaee77870ad136f94a
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/78186
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
M chipset_enable.c
M ich_descriptors.c
M ichspi.c
M include/programmer.h
4 files changed, 46 insertions(+), 8 deletions(-)

diff --git a/chipset_enable.c b/chipset_enable.c
index 3846ecf..1c24b92 100644
--- a/chipset_enable.c
+++ b/chipset_enable.c
@@ -601,6 +601,7 @@
 		break;
 	case CHIPSET_100_SERIES_SUNRISE_POINT:
 	case CHIPSET_C620_SERIES_LEWISBURG:
+	case CHIPSET_C740_SERIES_EMMITSBURG:
 	case CHIPSET_300_SERIES_CANNON_POINT:
 	case CHIPSET_400_SERIES_COMET_POINT:
 	case CHIPSET_500_SERIES_TIGER_POINT:
@@ -712,6 +713,7 @@
 		break;
 	case CHIPSET_500_SERIES_TIGER_POINT:
 	case CHIPSET_600_SERIES_ALDER_POINT:
+	case CHIPSET_C740_SERIES_EMMITSBURG:
 	case CHIPSET_METEOR_LAKE:
 		boot_straps = boot_straps_pch500;
 		break;
@@ -987,6 +989,11 @@
 	return enable_flash_pch100_or_c620(cfg, dev, name, 0x1f, 5, CHIPSET_C620_SERIES_LEWISBURG);
 }
 
+static int enable_flash_c740(const struct programmer_cfg *cfg, struct pci_dev *const dev, const char *const name)
+{
+	return enable_flash_pch100_or_c620(cfg, dev, name, 0x1f, 5, CHIPSET_C740_SERIES_EMMITSBURG);
+}
+
 static int enable_flash_pch300(const struct programmer_cfg *cfg, struct pci_dev *const dev, const char *const name)
 {
 	return enable_flash_pch100_or_c620(cfg, dev, name, 0x1f, 5, CHIPSET_300_SERIES_CANNON_POINT);
@@ -2123,7 +2130,7 @@
 	{0x8086, 0xa247, B_S,    NT,  "Intel", "C620 Series Chipset Supersku",	enable_flash_c620},
 	{0x8086, 0xa248, B_S,    NT,  "Intel", "C620 Series Chipset Supersku",	enable_flash_c620},
 	{0x8086, 0xa249, B_S,    NT,  "Intel", "C620 Series Chipset Supersku",	enable_flash_c620},
-	{0x8086, 0x1bca, B_S,    NT,  "Intel", "Emmitsburg Chipset SKU",	enable_flash_c620},
+	{0x8086, 0x1bca, B_S,    DEP, "Intel", "Emmitsburg Chipset SKU",	enable_flash_c740},
 	{0x8086, 0xa2c4, B_S,    NT,  "Intel", "H270",				enable_flash_pch100},
 	{0x8086, 0xa2c5, B_S,    NT,  "Intel", "Z270",				enable_flash_pch100},
 	{0x8086, 0xa2c6, B_S,    NT,  "Intel", "Q270",				enable_flash_pch100},
diff --git a/ich_descriptors.c b/ich_descriptors.c
index c3d062e..7bdca61 100644
--- a/ich_descriptors.c
+++ b/ich_descriptors.c
@@ -44,6 +44,7 @@
 	case CHIPSET_GEMINI_LAKE:
 		return 6;
 	case CHIPSET_C620_SERIES_LEWISBURG:
+	case CHIPSET_C740_SERIES_EMMITSBURG:
 	case CHIPSET_300_SERIES_CANNON_POINT:
 	case CHIPSET_400_SERIES_COMET_POINT:
 	case CHIPSET_500_SERIES_TIGER_POINT:
@@ -75,6 +76,7 @@
 {
 	switch (cs) {
 	case CHIPSET_C620_SERIES_LEWISBURG:
+	case CHIPSET_C740_SERIES_EMMITSBURG:
 	case CHIPSET_APOLLO_LAKE:
 	case CHIPSET_600_SERIES_ALDER_POINT:
 	case CHIPSET_METEOR_LAKE:
@@ -117,9 +119,9 @@
 		"5 series Ibex Peak", "6 series Cougar Point", "7 series Panther Point",
 		"8 series Lynx Point", "Baytrail", "8 series Lynx Point LP", "8 series Wellsburg",
 		"9 series Wildcat Point", "9 series Wildcat Point LP", "100 series Sunrise Point",
-		"C620 series Lewisburg", "300 series Cannon Point", "400 series Comet Point",
-		"500 series Tiger Point", "600 series Alder Point", "Meteor Lake",
-		"Apollo Lake", "Gemini Lake", "Jasper Lake", "Elkhart Lake",
+		"C620 series Lewisburg", "C740 series Emmitsburg", "300 series Cannon Point",
+		"400 series Comet Point", "500 series Tiger Point", "600 series Alder Point",
+		"Meteor Lake", "Apollo Lake", "Gemini Lake", "Jasper Lake", "Elkhart Lake",
 	};
 	if (cs < CHIPSET_ICH8 || cs - CHIPSET_ICH8 + 1 >= ARRAY_SIZE(chipset_names))
 		cs = 0;
@@ -211,6 +213,7 @@
 	case CHIPSET_9_SERIES_WILDCAT_POINT_LP:
 	case CHIPSET_100_SERIES_SUNRISE_POINT:
 	case CHIPSET_C620_SERIES_LEWISBURG:
+	case CHIPSET_C740_SERIES_EMMITSBURG:
 	case CHIPSET_300_SERIES_CANNON_POINT:
 	case CHIPSET_400_SERIES_COMET_POINT:
 	case CHIPSET_500_SERIES_TIGER_POINT:
@@ -313,6 +316,7 @@
 		return freq_str[2][value];
 	case CHIPSET_500_SERIES_TIGER_POINT:
 	case CHIPSET_600_SERIES_ALDER_POINT:
+	case CHIPSET_C740_SERIES_EMMITSBURG:
 	case CHIPSET_METEOR_LAKE:
 		return freq_str[3][value];
 	case CHIPSET_ELKHART_LAKE:
@@ -357,6 +361,7 @@
 	switch (cs) {
 	case CHIPSET_100_SERIES_SUNRISE_POINT:
 	case CHIPSET_C620_SERIES_LEWISBURG:
+	case CHIPSET_C740_SERIES_EMMITSBURG:
 	case CHIPSET_300_SERIES_CANNON_POINT:
 	case CHIPSET_400_SERIES_COMET_POINT:
 	case CHIPSET_500_SERIES_TIGER_POINT:
@@ -472,15 +477,27 @@
 void prettyprint_ich_descriptor_master(const enum ich_chipset cs, const struct ich_descriptors *const desc)
 {
 	ssize_t i;
-	const ssize_t nm = ich_number_of_masters(cs, &desc->content);
+	ssize_t nm = ich_number_of_masters(cs, &desc->content);
 	msg_pdbg2("=== Master Section ===\n");
 	if (nm < 0) {
 		msg_pdbg2("%s: number of masters too high (%d).\n", __func__,
 			  desc->content.NM + 1);
 		return;
 	}
+	if (cs == CHIPSET_C740_SERIES_EMMITSBURG) {
+		/*
+		 * The SPI programming guide says there are 6 masters (thus NM=6), but it
+		 * can only name 5. If there's a 6th then it's undocumented.
+		 * However the first 5 are matching '500 Series PCH' and since C740 is a
+		 * 500 Series clone, this field probably was not updated when writing the
+		 * document.
+		 * Hardcode to 5 to be compatible with '500 Series PCH' below.
+		 */
+		nm = 5;
+	}
 	for (i = 0; i < nm; i++)
 		msg_pdbg2("FLMSTR%zd  0x%08"PRIx32"\n", i + 1, desc->master.FLMSTRs[i]);
+
 	msg_pdbg2("\n");
 
 	msg_pdbg2("--- Details ---\n");
@@ -489,6 +506,7 @@
 	    cs == CHIPSET_400_SERIES_COMET_POINT ||
 	    cs == CHIPSET_500_SERIES_TIGER_POINT ||
 	    cs == CHIPSET_600_SERIES_ALDER_POINT ||
+	    cs == CHIPSET_C740_SERIES_EMMITSBURG ||
 	    cs == CHIPSET_JASPER_LAKE || cs == CHIPSET_METEOR_LAKE) {
 		const char *const master_names[] = {
 			"BIOS", "ME", "GbE", "DevE", "EC",
@@ -1021,8 +1039,8 @@
 			warn_peculiar_desc("Gemini Lake");
 			return CHIPSET_GEMINI_LAKE;
 		}
-		if (content->ISL <= 80)
-			return CHIPSET_C620_SERIES_LEWISBURG;
+		if (content->ISL == 0x50)
+			return CHIPSET_C740_SERIES_EMMITSBURG;
 		warn_peculiar_desc("Ibex Peak");
 		return CHIPSET_5_SERIES_IBEX_PEAK;
 	} else if (upper->MDTBA == 0x00) {
@@ -1095,6 +1113,7 @@
 		break;
 	case CHIPSET_100_SERIES_SUNRISE_POINT:
 	case CHIPSET_C620_SERIES_LEWISBURG:
+	case CHIPSET_C740_SERIES_EMMITSBURG:
 	case CHIPSET_APOLLO_LAKE:
 		if (component->modes.freq_read != 6) {
 			msg_pwarn("\nThe flash descriptor looks like a Skylake/Sunrise Point descriptor.\n"
@@ -1242,6 +1261,7 @@
 	case CHIPSET_9_SERIES_WILDCAT_POINT_LP:
 	case CHIPSET_100_SERIES_SUNRISE_POINT:
 	case CHIPSET_C620_SERIES_LEWISBURG:
+	case CHIPSET_C740_SERIES_EMMITSBURG:
 	case CHIPSET_300_SERIES_CANNON_POINT:
 	case CHIPSET_400_SERIES_COMET_POINT:
 	case CHIPSET_500_SERIES_TIGER_POINT:
@@ -1287,6 +1307,7 @@
 	switch (cs) {
 	case CHIPSET_100_SERIES_SUNRISE_POINT:
 	case CHIPSET_C620_SERIES_LEWISBURG:
+	case CHIPSET_C740_SERIES_EMMITSBURG:
 	case CHIPSET_300_SERIES_CANNON_POINT:
 	case CHIPSET_400_SERIES_COMET_POINT:
 	case CHIPSET_500_SERIES_TIGER_POINT:
diff --git a/ichspi.c b/ichspi.c
index 2e38ff1..36a7b3b 100644
--- a/ichspi.c
+++ b/ichspi.c
@@ -457,6 +457,7 @@
 	switch (ich_gen) {
 	case CHIPSET_100_SERIES_SUNRISE_POINT:
 	case CHIPSET_C620_SERIES_LEWISBURG:
+	case CHIPSET_C740_SERIES_EMMITSBURG:
 	case CHIPSET_300_SERIES_CANNON_POINT:
 	case CHIPSET_400_SERIES_COMET_POINT:
 	case CHIPSET_500_SERIES_TIGER_POINT:
@@ -470,6 +471,7 @@
 	switch (ich_gen) {
 	case CHIPSET_100_SERIES_SUNRISE_POINT:
 	case CHIPSET_C620_SERIES_LEWISBURG:
+	case CHIPSET_C740_SERIES_EMMITSBURG:
 	case CHIPSET_300_SERIES_CANNON_POINT:
 	case CHIPSET_400_SERIES_COMET_POINT:
 	case CHIPSET_500_SERIES_TIGER_POINT:
@@ -492,6 +494,7 @@
 	switch (ich_gen) {
 	case CHIPSET_100_SERIES_SUNRISE_POINT:
 	case CHIPSET_C620_SERIES_LEWISBURG:
+	case CHIPSET_C740_SERIES_EMMITSBURG:
 	case CHIPSET_300_SERIES_CANNON_POINT:
 	case CHIPSET_400_SERIES_COMET_POINT:
 	case CHIPSET_500_SERIES_TIGER_POINT:
@@ -2050,6 +2053,7 @@
 	switch (ich_gen) {
 	case CHIPSET_100_SERIES_SUNRISE_POINT:
 	case CHIPSET_C620_SERIES_LEWISBURG:
+	case CHIPSET_C740_SERIES_EMMITSBURG:
 	case CHIPSET_300_SERIES_CANNON_POINT:
 	case CHIPSET_400_SERIES_COMET_POINT:
 	case CHIPSET_500_SERIES_TIGER_POINT:
@@ -2087,6 +2091,7 @@
 		*num_freg = 10;
 		break;
 	case CHIPSET_C620_SERIES_LEWISBURG:
+	case CHIPSET_C740_SERIES_EMMITSBURG:
 		*num_freg = 12;	/* 12 MMIO regs, but 16 regions in FD spec */
 		break;
 	case CHIPSET_300_SERIES_CANNON_POINT:
@@ -2150,6 +2155,7 @@
 	switch (ich_gen) {
 	case CHIPSET_100_SERIES_SUNRISE_POINT:
 	case CHIPSET_C620_SERIES_LEWISBURG:
+	case CHIPSET_C740_SERIES_EMMITSBURG:
 	case CHIPSET_300_SERIES_CANNON_POINT:
 	case CHIPSET_400_SERIES_COMET_POINT:
 	case CHIPSET_500_SERIES_TIGER_POINT:
@@ -2230,6 +2236,7 @@
 		case CHIPSET_ICH8:
 		case CHIPSET_100_SERIES_SUNRISE_POINT:
 		case CHIPSET_C620_SERIES_LEWISBURG:
+		case CHIPSET_C740_SERIES_EMMITSBURG:
 		case CHIPSET_300_SERIES_CANNON_POINT:
 		case CHIPSET_400_SERIES_COMET_POINT:
 		case CHIPSET_500_SERIES_TIGER_POINT:
@@ -2269,6 +2276,7 @@
 		case CHIPSET_ICH8:
 		case CHIPSET_100_SERIES_SUNRISE_POINT:
 		case CHIPSET_C620_SERIES_LEWISBURG:
+		case CHIPSET_C740_SERIES_EMMITSBURG:
 		case CHIPSET_300_SERIES_CANNON_POINT:
 		case CHIPSET_400_SERIES_COMET_POINT:
 		case CHIPSET_500_SERIES_TIGER_POINT:
@@ -2310,7 +2318,8 @@
 	     ich_gen == CHIPSET_300_SERIES_CANNON_POINT ||
 	     ich_gen == CHIPSET_400_SERIES_COMET_POINT ||
 	     ich_gen == CHIPSET_500_SERIES_TIGER_POINT ||
-	     ich_gen == CHIPSET_600_SERIES_ALDER_POINT)) {
+	     ich_gen == CHIPSET_600_SERIES_ALDER_POINT ||
+	     ich_gen == CHIPSET_C740_SERIES_EMMITSBURG)) {
 		msg_pdbg("Enabling hardware sequencing by default for 100+ series PCH.\n");
 		ich_spi_mode = ich_hwseq;
 	}
diff --git a/include/programmer.h b/include/programmer.h
index 562f58a..15df0d4 100644
--- a/include/programmer.h
+++ b/include/programmer.h
@@ -354,6 +354,7 @@
 	CHIPSET_9_SERIES_WILDCAT_POINT_LP,
 	CHIPSET_100_SERIES_SUNRISE_POINT, /* also 6th/7th gen Core i/o (LP) variants */
 	CHIPSET_C620_SERIES_LEWISBURG,
+	CHIPSET_C740_SERIES_EMMITSBURG,
 	CHIPSET_300_SERIES_CANNON_POINT,
 	CHIPSET_400_SERIES_COMET_POINT,
 	CHIPSET_500_SERIES_TIGER_POINT,

