Edward O'Callaghan uploaded patch set #2 to this change.

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chipset_enable.c: Add Intel pch6 did=0x1e4{1,2,3} support

BUG=none
BRANCH=none
TEST=none

Change-Id: Ic69dc024e9af0c43d6b3a8213a5dc5d2f898c447
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
---
M chipset_enable.c
1 file changed, 3 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/flashrom refs/changes/90/47090/2

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Gerrit-Project: flashrom
Gerrit-Branch: master
Gerrit-Change-Id: Ic69dc024e9af0c43d6b3a8213a5dc5d2f898c447
Gerrit-Change-Number: 47090
Gerrit-PatchSet: 2
Gerrit-Owner: Edward O'Callaghan <quasisec@chromium.org>
Gerrit-Reviewer: Angel Pons <th3fanbus@gmail.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org>
Gerrit-CC: Paul Menzel <paulepanter@users.sourceforge.net>
Gerrit-MessageType: newpatchset