Bill XIE has uploaded this change for review.
ichspi: Merge spi_master implementations for Intel ich
There seems no problem to use ich_spi_probe_opcode() for
spi_master::probe_opcode() on ich7, so we may merge former
spi_master_ich7 and spi_master_ich9 into spi_master_ich, for both
init_ich7_spi() and init_ich_default().
Change-Id: I6a65c97e910622a55da7cef8a10de3af6a99c9e8
Signed-off-by: persmule <persmule@hardenedlinux.org>
---
M ichspi.c
1 file changed, 3 insertions(+), 14 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/93/84593/1
diff --git a/ichspi.c b/ichspi.c
index d01f2f3..e9de3b7 100644
--- a/ichspi.c
+++ b/ichspi.c
@@ -1991,18 +1991,7 @@
msg_gspew("resulted in 0x%08"PRIx32".\n", mmio_readl(addr));
}
-static const struct spi_master spi_master_ich7 = {
- .max_data_read = 64,
- .max_data_write = 64,
- .command = ich_spi_send_command,
- .multicommand = ich_spi_send_multicommand,
- .map_flash_region = physmap,
- .unmap_flash_region = physunmap,
- .read = default_spi_read,
- .write_256 = default_spi_write_256,
-};
-
-static const struct spi_master spi_master_ich9 = {
+static const struct spi_master spi_master_ich = {
.max_data_read = 64,
.max_data_write = 64,
.command = ich_spi_send_command,
@@ -2054,7 +2043,7 @@
}
ich_init_opcodes(ich_gen);
ich_set_bbar(0, ich_gen);
- register_spi_master(&spi_master_ich7, NULL);
+ register_spi_master(&spi_master_ich, NULL);
return 0;
}
@@ -2420,7 +2409,7 @@
memcpy(opaque_hwseq_data, &hwseq_data, sizeof(*opaque_hwseq_data));
register_opaque_master(&opaque_master_ich_hwseq, opaque_hwseq_data);
} else {
- register_spi_master(&spi_master_ich9, NULL);
+ register_spi_master(&spi_master_ich, NULL);
}
return 0;
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