Attention is currently required from: Simon Buhrow, Edward O'Callaghan, Samir Ibradžić.
1 comment:
Patchset:
Not sure if I'm doing something wrong. The patch works so far, but […]
I wondered what device was used for testing so far and
stumbled over this picture[1] mentioned in the original
commit message. There's some 1.36MHz shown in it, so I
tried again with such a low speed (divisor=44) and, tada,
it makes a difference. No idea what is going on inside
that chip. My numbers[2] even suggest that sending the
commands in two packets (original chunksize) is faster
*in my setup*.
[1] https://ibb.co/0c1J25d
[2] https://paste.flashrom.org/view.php?id=3472
NB. What would really increase speed in the tested
scenario (writing random data, hence everything needs
to be erased) is to choose a bigger erase block size.
I have this on my todo list since my very first days
with flashrom. If I drop 4K and 32K blocks from
`flashchips.c`, it's about twice as fast. But as this
is not a common use case, I did not see it as a
priority. OTOH, it always bugs me, for instance when
I switch back and forth between coreboot and another
firmware.
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