Felix Singer has uploaded this change for review.
opaque_master: Mark Opaque chip as tested for WP
Opaque masters, by design, populate the flashchip structure during
the execution of their probe function. Therefore any opaque master
operation displays a message to the user:
"This flash part has status UNTESTED for operations: WP".
However, for all the other operations (read, write, erase) opaque
masters always mark them as tested. Thus, align WP as marked tested
inline with other opaque chip operations.
BUG=b:258755442
TEST=the following does not display untested message:
1) flashrom -p dummy:size=8388608,emulate=VARIABLE_SIZE
2) flashrom -p internal (on Intel device)
Original-Change-Id: I5ae4cb49eb0abc6ab26cfe2f3359e4e50dd4fd4f
Original-Signed-off-by: Anastasia Klimchuk <aklm@chromium.org>
Original-Reviewed-on: https://review.coreboot.org/c/flashrom/+/69842
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Original-Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Original-Reviewed-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>
Original-Reviewed-by: Felix Singer <felixsinger@posteo.net>
Change-Id: Iaef2026a9e06a823ab481853b520022ba83b1ca1
Signed-off-by: Felix Singer <felixsinger@posteo.net>
---
M dummyflasher.c
M ichspi.c
M nicintel_eeprom.c
3 files changed, 35 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/85/69985/1
diff --git a/dummyflasher.c b/dummyflasher.c
index 110a88c..35cdfef 100644
--- a/dummyflasher.c
+++ b/dummyflasher.c
@@ -145,7 +145,7 @@
msg_cdbg("%s: set flash->total_size to %dK bytes.\n", __func__,
flash->chip->total_size);
- flash->chip->tested = TEST_OK_PREW;
+ flash->chip->tested = TEST_OK_PREWB;
if (emu_data->erase_to_zero)
flash->chip->feature_bits |= FEATURE_ERASED_ZERO;
diff --git a/ichspi.c b/ichspi.c
index b3beaea..cd6e802 100644
--- a/ichspi.c
+++ b/ichspi.c
@@ -1485,7 +1485,7 @@
msg_cdbg("In that range are %d erase blocks with %d B each.\n",
size_high / erase_size_high, erase_size_high);
}
- flash->chip->tested = TEST_OK_PREW;
+ flash->chip->tested = TEST_OK_PREWB;
return 1;
}
diff --git a/nicintel_eeprom.c b/nicintel_eeprom.c
index ff2c3ce..4d5ab6b 100644
--- a/nicintel_eeprom.c
+++ b/nicintel_eeprom.c
@@ -115,7 +115,7 @@
/* Emulated eeprom has a fixed size of 4 KB */
flash->chip->total_size = 4;
flash->chip->page_size = flash->chip->total_size * 1024;
- flash->chip->tested = TEST_OK_PREW;
+ flash->chip->tested = TEST_OK_PREWB;
flash->chip->gran = write_gran_1byte_implicit_erase;
flash->chip->block_erasers->eraseblocks[0].size = flash->chip->page_size;
flash->chip->block_erasers->eraseblocks[0].count = 1;
@@ -146,7 +146,7 @@
}
flash->chip->page_size = EE_PAGE_MASK + 1;
- flash->chip->tested = TEST_OK_PREW;
+ flash->chip->tested = TEST_OK_PREWB;
flash->chip->gran = write_gran_1byte_implicit_erase;
flash->chip->block_erasers->eraseblocks[0].size = (EE_PAGE_MASK + 1);
flash->chip->block_erasers->eraseblocks[0].count = (flash->chip->total_size * 1024) / (EE_PAGE_MASK + 1);
To view, visit change 69985. To unsubscribe, or for help writing mail filters, visit settings.