Nico Huber merged this change.
flashchips: Split MT25Q from N25Q
The MT25Q is the successor to the N25Q from Micron/Numonyx/ST. The MT25Q
is almost entirely backwards compatible with the N25Q series, however,
the MT25Q has additional subsector erase commands available, and there
are differences in stacked devices in the higher capacity variants. The
N25Q devices are left with "Micron/Numonyx/ST" as the vendor and MT25Q
devices are set with "Micron" as the vendor.
Signed-off-by: Jacob Creedon <jcreedon@google.com>
Change-Id: I9d79978544b19cf9acd5f3ea6196cf6f3b3435ef
Reviewed-on: https://review.coreboot.org/c/flashrom/+/34488
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
---
M flashchips.c
1 file changed, 82 insertions(+), 2 deletions(-)
diff --git a/flashchips.c b/flashchips.c
index 15c33c1..31a922e 100644
--- a/flashchips.c
+++ b/flashchips.c
@@ -10544,8 +10544,88 @@
},
{
+ .vendor = "Micron/Numonyx/ST",
+ .name = "N25Q256..3E", /* ..3E = 3V, uniform 64KB/4KB blocks/sectors */
+ .bustype = BUS_SPI,
+ .manufacture_id = ST_ID,
+ .model_id = ST_N25Q256__3E,
+ .total_size = 32768,
+ .page_size = 256,
+ /* supports SFDP */
+ /* OTP: 64B total; read 0x4B, write 0x42 */
+ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_WREN,
+ .tested = TEST_UNTESTED,
+ .probe = probe_spi_rdid,
+ .probe_timing = TIMING_ZERO,
+ .block_erasers =
+ {
+ {
+ .eraseblocks = { {4 * 1024, 8192} },
+ .block_erase = spi_block_erase_21,
+ }, {
+ .eraseblocks = { {4 * 1024, 8192} },
+ .block_erase = spi_block_erase_20,
+ }, {
+ .eraseblocks = { {64 * 1024, 512} },
+ .block_erase = spi_block_erase_dc,
+ }, {
+ .eraseblocks = { {64 * 1024, 512} },
+ .block_erase = spi_block_erase_d8,
+ }, {
+ .eraseblocks = { {32768 * 1024, 1} },
+ .block_erase = spi_block_erase_c7,
+ }
+ },
+ .printlock = spi_prettyprint_status_register_n25q, /* TODO: config, lock, flag regs */
+ .unlock = spi_disable_blockprotect_n25q, /* TODO: per 64kB sector lock registers */
+ .write = spi_chip_write_256, /* Multi I/O supported */
+ .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */
+ .voltage = {2700, 3600},
+ },
+
+ {
+ .vendor = "Micron/Numonyx/ST",
+ .name = "N25Q512..3E", /* ..3E = 3V, uniform 64KB/4KB blocks/sectors */
+ .bustype = BUS_SPI,
+ .manufacture_id = ST_ID,
+ .model_id = ST_N25Q512__3E,
+ .total_size = 65536,
+ .page_size = 256,
+ /* supports SFDP */
+ /* OTP: 64B total; read 0x4B, write 0x42 */
+ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_WREN,
+ .tested = TEST_OK_PREW,
+ .probe = probe_spi_rdid,
+ .probe_timing = TIMING_ZERO,
+ .block_erasers =
+ {
+ {
+ .eraseblocks = { {4 * 1024, 16384} },
+ .block_erase = spi_block_erase_21,
+ }, {
+ .eraseblocks = { {4 * 1024, 16384} },
+ .block_erase = spi_block_erase_20,
+ }, {
+ .eraseblocks = { {64 * 1024, 1024} },
+ .block_erase = spi_block_erase_dc,
+ }, {
+ .eraseblocks = { {64 * 1024, 1024} },
+ .block_erase = spi_block_erase_d8,
+ }, {
+ .eraseblocks = { {65536 * 1024, 1} },
+ .block_erase = spi_block_erase_c7,
+ }
+ },
+ .printlock = spi_prettyprint_status_register_n25q, /* TODO: config, lock, flag regs */
+ .unlock = spi_disable_blockprotect_n25q, /* TODO: per 64kB sector lock registers */
+ .write = spi_chip_write_256, /* Multi I/O supported */
+ .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */
+ .voltage = {2700, 3600},
+ },
+
+ {
.vendor = "Micron",
- .name = "N25Q256..3E/MT25QL256", /* ..3E/L = 3V, uniform 64KB/4KB blocks/sectors */
+ .name = "MT25QL256", /* L = 3V, uniform 64KB/4KB blocks/sectors */
.bustype = BUS_SPI,
.manufacture_id = ST_ID,
.model_id = ST_N25Q256__3E,
@@ -10585,7 +10665,7 @@
{
.vendor = "Micron",
- .name = "N25Q512..3E/MT25QL512", /* ..3E/L = 3V, uniform 64KB/4KB blocks/sectors */
+ .name = "MT25QL512", /* L = 3V, uniform 64KB/4KB blocks/sectors */
.bustype = BUS_SPI,
.manufacture_id = ST_ID,
.model_id = ST_N25Q512__3E,
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